D6417729RHF200BV Renesas Electronics America, D6417729RHF200BV Datasheet - Page 127
D6417729RHF200BV
Manufacturer Part Number
D6417729RHF200BV
Description
IC SUPER H MPU ROMLESS 208QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.D6417729RF133BV.pdf
(857 pages)
Specifications of D6417729RHF200BV
Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, FIFO, IrDA, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
96
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.85 V ~ 2.15 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
208-QFP Exposed Pad, 208-eQFP, 208-HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
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2.6.4
DSP operation instructions are instructions for digital signal processing performed by the DSP
unit. These instructions have a 32-bit instruction code, and multiple instructions can be executed
in parallel. The instruction code is divided into an A field and B field; a double data transfer
instruction is specified in the A field, and a single or double data operation instruction in the B
field. Instructions can be specified independently, and are also executed independently. The
function of the A field—that is, the data transfer instruction field—is basically the same as in the
double data transfer instructions described in section 2.6.3, Single and Double Data Transfer for
DSP Data Instructions, but has a special function in load instructions.
B-field data operation instructions are of three kinds: double data operation instructions,
conditional single data operation instructions, and unconditional single data operation instructions.
The formats of the DSP operation instructions are shown in table 2.30. The respective operands
are selected independently from the DSP registers. The correspondence between DSP operation
instruction operands and registers is shown in table 2.31.
Table 2.30 DSP Operation Instruction Formats
Type
Double data operation instructions
(6 operands)
Conditional single
data operation
instructions
Unconditional single
data operation
instructions
DSP Operation Instruction Set
3 operands
2 operands
1 operand
3 operands
2 operands
1 operand
Instruction Formats
DCT
DCF
DCT
DCF
DCT
DCF
DCT
DCF
ALUop. Sx, Sy, Du
MLTop. Se, Sf, Dg
ALUop. Sx, Sy, Dz
ALUop. Sx, Sy, Dz
ALUop. Sx, Sy, Dz
ALUop. Sx, Dz
ALUop. Sx, Dz
ALUop. Sx, Dz
ALUop. Sy, Dz
ALUop. Sy, Dz
ALUop. Sy, Dz
ALUop. Dz
ALUop. Dz
ALUop. Dz
ALUop. Sx, Sy, Du
MLTop. Se, Sf, Dg
ALUop. Sx, Dz
ALUop. Sy, Dz
ALUop. Sx, Sy
ALUop. Dz
Instructions
PADD PMULS,
PSUB PMULS
PADD, PAND, POR, PSHA,
PSHL, PSUB, PXOR
PCOPY, PDEC, PDMSB,
PINC,PLDS, PSTS, PNEG
PCLR
PADDC, PSUBC, PMULS
PCMP, PABS, PRND
PSHA #imm, PSHL #imm
Rev. 5.0, 09/03, page 79 of 806
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