D6417729RHF200BV Renesas Electronics America, D6417729RHF200BV Datasheet - Page 42

• Manufacturer Part Number: D6417729RHF200BV
• Description: IC SUPER H MPU ROMLESS 208QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of D6417729RHF200BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 96
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.85 V ~ 2.15 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-QFP Exposed Pad, 208-eQFP, 208-HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Figure 24.36 Synchronous DRAM Burst Write Bus Cycle (RAS Down, Different Row
Figure 24.37 Synchronous DRAM Auto-Refresh Timing (TRAS = 1, TPC = 1) ..................... 739
Figure 24.38 Synchronous DRAM Self-Refresh Cycle (TRAS
Figure 24.39 Synchronous DRAM Mode Register Write Cycle ............................................... 741
Figure 24.40 PCMCIA Memory Bus Cycle (TED = 0, TEH = 0, No Wait) ............................. 742
Figure 24.41 PCMCIA Memory Bus Cycle (TED = 2, TEH = 1, One Wait, External Wait,
Figure 24.42 PCMCIA Memory Bus Cycle (Burst Read, TED = 0, TEH = 0, No Wait).......... 744
Figure 24.43 PCMCIA Memory Bus Cycle (Burst Read, TED = 1, TEH = 1, Two Waits,
Figure 24.44 PCMCIA I/O Bus Cycle (TED = 0, TEH = 0, No Wait)...................................... 746
Figure 24.45 PCMCIA I/O Bus Cycle (TED = 2, TEH = 1, One Wait, External Wait,
Figure 24.46 PCMCIA I/O Bus Cycle (TED = 1, TEH = 1, One Wait, Bus Sizing,
Figure 24.47 TCLK Input Timing ............................................................................................. 750
Figure 24.48 TCLK Clock Input Timing................................................................................... 750
Figure 24.49 RTC Crystal Oscillator Oscillation Settling Time at Power-On........................... 750
Figure 24.50 SCK Input Clock Timing ..................................................................................... 750
Figure 24.51 SCI I/O Timing in Synchronous Mode ................................................................ 751
Figure 24.52 I/O Port Timing .................................................................................................... 751
Figure 24.53 DREQ Input Timing............................................................................................. 752
Figure 24.54 DRAK Output Timing.......................................................................................... 752
Figure 24.55 TCK Input Timing................................................................................................ 753
Figure 24.56 TRST Input Timing (Reset Hold)......................................................................... 753
Figure 24.57 UDI Data Transfer Timing ................................................................................... 754
Figure 24.58 ASEMD0 Input Timing........................................................................................ 754
Figure 24.59 Output Load Circuit.............................................................................................. 755
Figure 24.60 Load Capacitance vs. Delay Time........................................................................ 756
Figure D.1
Figure D.2
Figure D.3
Rev. 5.0, 09/03, page xl of xlvi
Address, TPC = 1, RCD = 1) ............................................................................... 738
WAITSEL = 1)..................................................................................................... 743
Burst Pitch = 3, WAITSEL = 1)........................................................................... 745
WAITSEL = 1)..................................................................................................... 747
WAITSEL = 1)..................................................................................................... 748
Package Dimensions (FP-208C)........................................................................... 803
Package Dimensions (FP-208E)........................................................................... 804
Package Dimensions (BP-240A).......................................................................... 805
1, TPC = 1) ......................... 740