D6417729RHF200BV Renesas Electronics America, D6417729RHF200BV Datasheet - Page 103
D6417729RHF200BV
Manufacturer Part Number
D6417729RHF200BV
Description
IC SUPER H MPU ROMLESS 208QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.D6417729RF133BV.pdf
(857 pages)
Specifications of D6417729RHF200BV
Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, FIFO, IrDA, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
96
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.85 V ~ 2.15 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
208-QFP Exposed Pad, 208-eQFP, 208-HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
D6417729RHF200BV
Manufacturer:
EVERLIGHT
Quantity:
1 000
Company:
Part Number:
D6417729RHF200BV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Table 2.16 Single Data Transfer Instruction Formats
Single
data
transfer
Note: * Codes reserved for system use.
Parallel Processing Instructions: Parallel processing instructions are provided for efficient
execution of digital signal processing using the DSP unit. They are 32 bits long and allow four
simultaneous processes, an ALU operation, multiplication, and two data transfers.
Parallel processing instructions are divided into an A field and a B field. The A field defines data
transfer instructions and the B field an ALU operation instruction and multiply instruction. These
instructions can be defined independently, and the processing is executed in parallel,
independently and simultaneously. A-field parallel data transfer instructions are shown in table
2.17, and B-field ALU operation instructions and multiply instructions in table 2.18.
Type
MOVS.W @-As,Ds
MOVS.W @As,Ds
MOVS.W @As+,Ds
MOVS.W @As+Is,Ds
MOVS.W Ds,@-As
MOVS.W Ds,@As
MOVS.W Ds,@As+
MOVS.W Ds,@As+Is
MOVS.L @-As,Ds
MOVS.L @As,Ds
MOVS.L @As+,Ds
MOVS.L @As+Is,Ds
MOVS.L Ds,@-As
MOVS.L Ds,@As
MOVS.L Ds,@As+
MOVS.L Ds,@As+Is
Mnemonic
15 14 13 12 11 10 9
1
1
1
1
0
1
0:R4
1:R5
2:R2
3:R3
As
8
Rev. 5.0, 09/03, page 55 of 806
7
Ds 0:(*)
6
1:(*)
2:(*)
3:(*)
4:(*)
5:A1
6:(*)
7:A0
8:X0
9:X1
A:Y0
B:Y1
C:M0
D:A1G
E:M1
F:A0G
5
4
3
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
2
0
1
0
1
0
1
0
1
1
0
1
1
0
1
0
0
1
0
0
1
1
0
0
1
0
1
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