D6417729RHF200BV Renesas Electronics America, D6417729RHF200BV Datasheet - Page 114

• Manufacturer Part Number: D6417729RHF200BV
• Description: IC SUPER H MPU ROMLESS 208QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of D6417729RHF200BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 96
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.85 V ~ 2.15 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-QFP Exposed Pad, 208-eQFP, 208-HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

Instruction
DT
EXTS.B Rm,Rn
EXTS.W Rm,Rn
EXTU.B Rm,Rn
EXTU.W Rm,Rn
MAC.L
MAC.W
MUL.L
MULS.W Rm,Rn
MULU.W Rm,Rn
NEG
NEGC
SUB
SUBC
SUBV
Notes: 1. The normal minimum number of execution cycles is two, but five cycles are required
Rev. 5.0, 09/03, page 66 of 806
2. The normal minimum number of execution cycles is one, but three cycles are required
Rn
@Rm+,@Rn+
@Rm+,@Rn+
Rm,Rn
Rm,Rn
Rm,Rn
Rm,Rn
Rm,Rn
Rm,Rn
when the operation result is read from the MAC register immediately after the
instruction.
when the operation result is read from the MAC register immediately after the MUL
instruction.
Operation
Rn – 1
0, 1
A byte in Rm is sign-
extended
A word in Rm is sign-
extended
A byte in Rm is zero-
extended
A word in Rm is zero-
extended
Signed operation of (Rn)
Rn + 4
Rm + 4
32
Signed operation of (Rn)
Rn + 2
Rm + 2
16
Rn
32
Signed operation of Rn
16
Unsigned operation of
Rn
16
0–Rm
0–Rm–T
Borrow
Rn–Rm
Rn–Rm–T
Borrow
Rn–Rm
Underflow
(Rm)
(Rm)
Rm
32 + 64
16 + 64
32
16
16
Rm
Rm
T, else 0
MACL,
MAC
MAC
Rn
Rn, if Rn
Rn,
Rn,
T
T
Rm,
Rm,
32 bits
32 bits
32 bits
Rn
Rn,
Rn,
MACL,
MACL,
Rn
Rn
Rn
Rn
T
Rn,
64 bits
64 bits
MAC,
MAC,
T
Code
0100nnnn00010000
0110nnnnmmmm1110
0110nnnnmmmm1111
0110nnnnmmmm1100
0110nnnnmmmm1101
0000nnnnmmmm1111
0100nnnnmmmm1111
0000nnnnmmmm0111
0010nnnnmmmm1111
0010nnnnmmmm1110
0110nnnnmmmm1011
0110nnnnmmmm1010
0011nnnnmmmm1000
0011nnnnmmmm1010
0011nnnnmmmm1011
Privileged
Mode
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Cycles T Bit
1
1
1
1
1
2(5) *
2(5) *
2(5) *
1(3) *
1(3) *
1
1
1
1
1
1
1
1
2
2
Comparison
result
—
—
—
—
—
—
—
—
—
—
Borrow
—
Borrow
Underflow