D6417729RHF200BV Renesas Electronics America, D6417729RHF200BV Datasheet - Page 309

IC SUPER H MPU ROMLESS 208QFP

D6417729RHF200BV

Manufacturer Part Number
D6417729RHF200BV
Description
IC SUPER H MPU ROMLESS 208QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet

Specifications of D6417729RHF200BV

Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, FIFO, IrDA, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
96
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.85 V ~ 2.15 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
208-QFP Exposed Pad, 208-eQFP, 208-HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-

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Table 10.5 Register Configuration
Name
Watchdog timer counter
Watchdog timer
control/status register
Note: * Write with word access. Write with H'5A and H'A5, respectively, in the upper byte. Byte or
10.7
10.7.1
The watchdog timer counter (WTCNT) is an 8-bit readable/writable counter that increments on the
selected clock. WTCNT differs from other registers in that it is more difficult to write to. See
section 10.7.3, Notes on Register Access, for details. When an overflow occurs, it generates a reset
in watchdog timer mode and an interrupt in interval time mode. Its address is H'FFFFFF84. The
WTCNT counter is initialized to H'00 only by a power-on reset through the RESETP pin. Use
word access to write to the WTCNT counter, with H'5A in the upper byte. Use byte access to read
WTCNT.
10.7.2
The watchdog timer control/status register (WTCSR) is an 8-bit readable/writable register
composed of bits to select the clock used for the count, bits to select the timer mode, and overflow
flags. WTCSR differs from other registers in that it is more difficult to write to. See section 10.7.3,
Notes on Register Access, for details. Its address is H'FFFFFF86. The WTCSR register is
initialized to H'00 only by a power-on reset through the RESETP pin. When a WDT overflow
causes an internal reset, WTCSR retains its value. When used to count the clock settling time for
canceling a standby, it retains its value after counter overflow. Use word access to write to the
WTCSR counter, with H'A5 in the upper byte. Use byte access to read WTCSR.
Note: The method of writing data to this register differs from that for ordinary registers in order
Initial value:
to ensure that data is not overwritten mistakenly. Refer to section 10.7.3, Notes on
Register Access, for details.
longword writes are not possible. Read with byte access.
WDT Registers
Watchdog Timer Counter (WTCNT)
Watchdog Timer Control/Status Register (WTCSR)
R/W:
Bit:
R/W
7
0
Abbreviation
WTCNT
WTCSR
R/W
6
0
R/W
R/W
R/W *
R/W *
5
0
R/W
Access Size
R: byte;
W: word *
R: byte;
W: word *
4
0
R/W
3
0
Rev. 5.0, 09/03, page 261 of 806
Initial Value
H'00
H'00
R/W
2
0
R/W
1
0
Address
H'FFFFFF84
H'FFFFFF86
R/W
0
0

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