D6417729RHF200BV Renesas Electronics America, D6417729RHF200BV Datasheet - Page 685

• Manufacturer Part Number: D6417729RHF200BV
• Description: IC SUPER H MPU ROMLESS 208QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of D6417729RHF200BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 96
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.85 V ~ 2.15 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-QFP Exposed Pad, 208-eQFP, 208-HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

20.5
Port D comprises a 6-bit input/output port and 2-bit input port with the pin configuration shown in
figure 20.4. Each pin has an input pull-up MOS, which is controlled by the port D control register
(PDCR) in the PFC.
20.5.1
Table 20.7 summarizes the port D register.
Table 20.7 Port D Register
Notes: This register is located in area 1 of physical space. Therefore, when the cache is on, either
Name
Port D data register
access this register from the P2 area of logical space or else make an appropriate setting
using the MMU so that this register is not cached.
* Means no value.
1. When address translation by the MMU does not apply, the address in parentheses
Port D
Register Description
should be used.
Port D
Abbreviation
PDDR
PTD7 (input/output) / DACK1 (output)
PTD6 (input) / DREQ1 (input)
PTD5 (input/output) / DACK0 (output)
PTD4 (input) / DREQ0 (input)
PTD3 (input/output) / WAKEUP (output)
PTD2 (input/output) / RESETOUT (output)
PTD1 (input/output) / DRAK0 (output)
PTD0 (input/output) / DRAK1 (output)
Figure 20.4 Port D
R/W
R/W or R
Initial Value
B'0*0*0000
Rev. 5.0, 09/03, page 637 of 806
H'04000126
(H'A4000126) *
Address
1
Access Size
8