D6417729RHF200BV Renesas Electronics America, D6417729RHF200BV Datasheet - Page 626

• Manufacturer Part Number: D6417729RHF200BV
• Description: IC SUPER H MPU ROMLESS 208QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of D6417729RHF200BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 96
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.85 V ~ 2.15 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-QFP Exposed Pad, 208-eQFP, 208-HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

17.2.9
The FIFO control register (SCFCR) resets the quantity of data in the transmit and receive FIFO
registers, sets the trigger data quantity, and contains an enable bit for loop-back testing. SCFCR
can always be read and written to by the CPU. It is initialized to H'00 by a reset, by the module
standby function, and in standby mode.
Bits 7 and 6—Receive FIFO Data Trigger (RTRG1, RTRG0): Set the quantity of receive data
which sets the receive data full (RDF) flag in the serial status register (SCSSR). The RDF flag is
set when the quantity of receive data stored in the receive FIFO register (SCFRDR) becomes equal
or greater than the set trigger number shown below.
Bit 7: RTRG1
0
0
1
1
Bits 5 and 4—Transmit FIFO Data Trigger (TTRG1, TTRG0): Set the quantity of remaining
transmit data which sets the transmit FIFO data register empty (TDFE) flag in the serial status
register (SCSSR). The TDFE flag is set when the quantity of transmit data in the transmit FIFO
data register (SCFTDR) becomes less than the set trigger number shown below.
Bit 5: TTRG1
0
0
1
1
Note: * Initial value. Values in parentheses mean the number of empty bits in SCFTDR when the
Rev. 5.0, 09/03, page 578 of 806
Initial value:
TDFE flag is set to 1.
FIFO Control Register (SCFCR)
R/W:
Bit:
RTRG1 RTRG0
R/W
7
0
Bit 6: RTRG0
0
1
0
1
Bit 4: TTRG0
0
1
0
1
R/W
6
0
TTRG1
R/W
5
0
TTRG0
R/W
4
0
Receive Trigger Number
1
4
8
14
Transmit Trigger Number
8 (8) *
4 (12)
2 (14)
1 (15)
MCE
R/W
3
0
TFRST
R/W
2
0
RFRST
R/W
1
0
(Initial value)
LOOP
R/W
0
0