D6417729RHF200BV Renesas Electronics America, D6417729RHF200BV Datasheet - Page 610

• Manufacturer Part Number: D6417729RHF200BV
• Description: IC SUPER H MPU ROMLESS 208QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of D6417729RHF200BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 96
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.85 V ~ 2.15 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-QFP Exposed Pad, 208-eQFP, 208-HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

17.2.4
The transmit FIFO data register (SCFTDR) is a FIFO register comprising sixteen 8-bit stages that
stores data for serial transmission. When the SCIF detects that the transmit shift register (SCTSR)
is empty, it moves transmit data written in the SCFTDR into SCTSR and starts serial transmission.
Continuous serial transmission is performed until there is no transmit data left in SCFTDR. The
CPU can always write to SCFTDR.
When SCFTDR is full of transmit data (16 stages), no more data can be written. If writing of new
data is attempted, the data is ignored.
17.2.5
The serial mode register (SCSMR) is an 8-bit register that specifies the SCIF serial
communication format and selects the clock source for the baud rate generator.
The CPU can always read and write to SCSMR. SCSMR is initialized to H'00 by a reset and in
standby or module standby mode.
Bit 7—Reserved: This bit is always read as 0. The write value should always be 0.
Bit 6—Character Length (CHR): Selects 7-bit or 8-bit data in asynchronous mode.
Bit 6: CHR
0
1
Rev. 5.0, 09/03, page 562 of 806
Initial value:
Transmit FIFO Data Register (SCFTDR)
Serial Mode Register (SCSMR)
R/W:
R/W:
Bit:
Bit:
Description
8-bit data
7-bit data
When 7-bit data is selected, the MSB (bit 7) of the transmit FIFO data register is
not transmitted.
W
—
R
7
7
0
CHR
R/W
W
6
6
0
R/W
PE
W
5
5
0
R/W
O/E
W
4
4
0
STOP
R/W
W
3
3
0
W
—
R
2
2
0
CKS1
R/W
W
1
1
0
(Initial value)
CKS0
R/W
W
0
0
0