D6417729RHF200BV Renesas Electronics America, D6417729RHF200BV Datasheet - Page 619

• Manufacturer Part Number: D6417729RHF200BV
• Description: IC SUPER H MPU ROMLESS 208QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of D6417729RHF200BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 96
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.85 V ~ 2.15 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-QFP Exposed Pad, 208-eQFP, 208-HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

17.2.8
The bit rate register (SCBRR) is an 8-bit register that, together with the baud rate generator clock
source selected by the CKS1 and CKS0 bits in the serial mode register (SCSMR), determines the
serial transmit/receive bit rate.
The CPU can always read and write to SCBRR. SCBRR is initialized to H'FF by a reset and in
module standby or standby mode. Each channel has independent baud rate generator control, so
different values can be set in two channels.
The SCBRR setting is calculated as follows:
Asynchronous mode:
Table 17.3 SCSMR Settings
Note: The bit rate error is given by the following formula:
n
0
1
2
3
Initial value:
B:
N:
P : Operating frequency for peripheral modules (MHz)
n:
Error (%) =
N =
Bit Rate Register (SCBRR)
R/W:
Bit rate (bits/s)
SCBRR setting for baud rate generator (0
Baud rate generator clock source (n
n, see table 17.3.)
64
Bit:
2
P
2n – 1
(N+1) × 64 × 2
R/W
7
1
Clock Source
P
P /4
P /16
P /64
B
10
R/W
Pφ
6
1
6
– 1
2n−1
× B
R/W
5
1
× 10
CKS1
0
0
1
1
6
0, 1, 2, 3) (for the clock sources and values of
− 1 × 100
R/W
4
1
N
255)
R/W
3
1
SCSMR Settings
Rev. 5.0, 09/03, page 571 of 806
R/W
2
1
CKS0
0
1
0
1
R/W
1
1
R/W
0
1