D6417729RHF200BV Renesas Electronics America, D6417729RHF200BV Datasheet - Page 700

• Manufacturer Part Number: D6417729RHF200BV
• Description: IC SUPER H MPU ROMLESS 208QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of D6417729RHF200BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 96
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.85 V ~ 2.15 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-QFP Exposed Pad, 208-eQFP, 208-HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

20.12.2 Port L Data Register (PLDR)
The port L data register (PLDR) is an 8-bit read-only register that stores data for pins PTL7 to
PTL0. Bits PL7DT to PL0DT correspond to pins PTL7 to PTL0. When the function is general
input port, if the port is read, the corresponding pin level is read. Table 20.22 shows the function
of PLDR.
PLDR is initialized to H'00 by power-on reset. It retains its previous value in software standby
mode and sleep mode, and in a manual reset.
As port L also has analog pin functions, it has no pull-up MOS.
Table 20.22 Port L Data Register (PLDR) Read/Write Operation
PLnMD1
0
1
Rev. 5.0, 09/03, page 652 of 806
Initial value:
PLnMD0
0
1
0
1
R/W:
Bit:
PL7DT
Pin State
Other function
(See table 19.1)
Reserved
Input
Input
R
7
0
PL6DT
R
6
0
PL5DT
Read
H'00
Pin state
H'00
Pin state
R
5
0
PL4DT
R
4
0
Write
Ignored (no effect on pin state)
Ignored (no effect on pin state)
Ignored (no effect on pin state)
Ignored (no effect on pin state)
PL3DT
R
3
0
PL2DT
R
2
0
PL1DT
R
1
0
(n = 0 to 7)
PL0DT
R
0
0