D6417729RHF200BV Renesas Electronics America, D6417729RHF200BV Datasheet - Page 637

• Manufacturer Part Number: D6417729RHF200BV
• Description: IC SUPER H MPU ROMLESS 208QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of D6417729RHF200BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 96
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.85 V ~ 2.15 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-QFP Exposed Pad, 208-eQFP, 208-HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

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Figures 17.9 and 17.10 show a sample flowchart for serial reception.
Use the following procedure for serial data reception after enabling the SCIF for reception.
1. Receive error handling and break detection: Read the DR, ER, and BRK flags in SCSSR to
2. SCIF status check and receive data read: Read the serial status register (SCSSR) and check that
3. Serial reception continuation procedure: To continue serial reception, read at least the receive
Serial data reception
identify any error, perform the appropriate error handling, then clear the DR, ER, and BRK
flags to 0. In the case of a framing error, a break can also be detected by reading the value of
the RxD pin.
RDF = 1, then read the receive data in the receive FIFO data register (SCFRDR), read 1 from
the RDF flag, and then clear the RDF flag to 0. The transition of the RDF flag from 0 to 1 can
be identified by an RXI interrupt.
trigger set number of receive data bytes from SCFRDR, read 1 from the RDF flag, then clear
the RDF flag to 0. The number of receive data bytes in SCFRDR can be ascertained by
reading the lower bits of SCFDR.
Rev. 5.0, 09/03, page 589 of 806