D6417729RHF200BV Renesas Electronics America, D6417729RHF200BV Datasheet - Page 412

• Manufacturer Part Number: D6417729RHF200BV
• Description: IC SUPER H MPU ROMLESS 208QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of D6417729RHF200BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 96
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.85 V ~ 2.15 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-QFP Exposed Pad, 208-eQFP, 208-HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

I I I I R R R R Q Q Q Q O O O O U U U U T T T T Pin Assertion Conditions:
11.3.9
With the SH7729R, address pin pull-up can be performed when the bus is released by setting the
PULA bit in BCR1 to 1. The address pins are pulled up for a 4-clock period after BACK is
asserted. Figure 11.41 shows the address pin pull-up timing. Similarly, data pin pull-up can be
performed by setting the PULD bit in BCR1 to 1. The data pins should be pulled up when the data
bus is not in use. The data pin pull-up timing for a read cycle is shown in figure 11.42, and the
timing for a write cycle in figure 11.43.
Rev. 5.0, 09/03, page 364 of 806
CKIO
A25−A0
BACK
When a memory refresh request has been generated but the refresh cycle has not yet begun
When an interrupt is generated with an interrupt request level higher than the setting of the
interrupt mask bits (I3–I0) in the status register (SR). (This does not depend on the SR.BL bit.)
Bus Pull-Up
Figure 11.41 Pull-Up Timing for Pins A25 to A0
Pull-up
Hi-Z