D6417729RHF200BV Renesas Electronics America, D6417729RHF200BV Datasheet - Page 62

• Manufacturer Part Number: D6417729RHF200BV
• Description: IC SUPER H MPU ROMLESS 208QFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7700r

Specifications of D6417729RHF200BV

• Core Processor: SH-3 DSP
• Core Size: 32-Bit
• Speed: 200MHz
• Connectivity: EBI/EMI, FIFO, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, WDT
• Number Of I /o: 96
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.85 V ~ 2.15 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 208-QFP Exposed Pad, 208-eQFP, 208-HQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -

FP-208C,
FP-208E
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
Rev. 5.0, 09/03, page 14 of 806
Pin No.
BP-240A
U18
U19
R18
T19
T17
R19
U17
R17
R16
P19
P18
P17
P16
N19
N18
N17
N16
M19
M18
M17
M16
L19
L18
L16
L17
K18
Pin Name
RAS3L/PTJ[0]
PTJ[1]
CASL/PTJ[2]
VssQ
CASU/PTJ[3]
VccQ
PTJ[4]
PTJ[5]
DACK0/PTD[5]
DACK1/PTD[7]
PTE[6]
PTE[3]
RAS3U/PTE[2]
PTE[1]
TDO/PTE[0]
BACK
BREQ
WAIT
RESETM
ADTRG/PTH[5]
IOIS16/PTG[7]
ASEMD0/PTG[6]
ASEBRKAK/PTG[5]
PTG[4]/CKIO2
AUDATA[3]/PTG[3]
AUDATA[2]/PTG[2]
I/O
O / I/O
I/O
O / I/O
—
O / I/O
—
I/O
I/O
O / I/O
O / I/O
I/O
I/O
O / I/O
I/O
O / I/O
O
I
I
I
I
I
I
O/I
O/I
I/O / O
I/O / O
Description
Lower 32/64 MB address
(SDRAM) RAS / I/O port J
I/O port J *
Lower 32/64 MB address
(SDRAM) CAS / I/O port J
Input/output power supply (0 V)
Upper 32 MB address (SDRAM)
CAS / I/O port J
Input/output power supply (3.3 V)
I/O port J
I/O port J
DMA acknowledge 0 / I/O port D
DMA acknowledge 1 / I/O port D
I/O port E
I/O port E
Upper 32 MB address (SDRAM)
RAS / I/O port E
I/O port E
Test data output / I/O port E
Bus acknowledge
Bus request
Hardware wait request
Manual reset request
Analog trigger / input port H
IOIS6 (PCMCIA) / input port G
ASE mode *
ASE break acknowledge / input
port G
Input port G / clock output
AUD data / input port G
AUD data / input port G
5
4
/ input port G