D6417729RHF200BV Renesas Electronics America, D6417729RHF200BV Datasheet - Page 744
D6417729RHF200BV
Manufacturer Part Number
D6417729RHF200BV
Description
IC SUPER H MPU ROMLESS 208QFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7700r
Datasheet
1.D6417729RF133BV.pdf
(857 pages)
Specifications of D6417729RHF200BV
Core Processor
SH-3 DSP
Core Size
32-Bit
Speed
200MHz
Connectivity
EBI/EMI, FIFO, IrDA, SCI, SmartCard
Peripherals
DMA, POR, WDT
Number Of I /o
96
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.85 V ~ 2.15 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
208-QFP Exposed Pad, 208-eQFP, 208-HQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Available stocks
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23.4.2
Table 23.4 Reset Configuration
AS
AS
AS
ASD D D D M M M M D D D D 0 0 0 0 *
High-level
Low-level
Notes: 1. Performs main chip mode and ASE mode settings
Rev. 5.0, 09/03, page 696 of 806
2. In ASE mode, reset hold is enabled by driving the RESETP and TRST pins low for a
3. There are two ASE modes, one for executing software in the emulator’s firmware (ASE
Reset Configuration
1
ASEMD0 = H, main chip mode
ASEMD0 = L, ASE mode
constant cycle. In this state, the CPU does not start up, even if RESETP is driven high.
When TRST is driven high, UDI operation is enabled, but the CPU does not start up.
The reset hold state is cancelled by the following:
• Boot request from UDI (boot sequence)
• Another RESETP assert (power-on reset)
break mode) and one for executing user software (ASE user mode).
R R R R ESE
Low-level
High-level
Low-level
High-level
ESE
ESET T T T P P P P
ESE
T T T T R R R R S S S S T T T T
Low-level
High-level
Low-level
High-level
Low-level
High-level
Low-level
High-level
Chip State
Normal reset and UDI reset
Normal reset
UDI reset only
Normal operation
ASE user mode *
ASE break mode *
UDI reset only
Normal operation
Reset hold *
2
3
: Normal reset
3
: RESETP assertion
masked
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