LPC1769FBD100,551 NXP Semiconductors, LPC1769FBD100,551 Datasheet - Page 744

• Manufacturer Part Number: LPC1769FBD100,551
• Description: IC ARM CORTEX MCU 512K 100-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC17xxr

Specifications of LPC1769FBD100,551

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 100-LQFP
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 120MHz
• Connectivity: CAN, Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 70
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 8x12b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC17
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: Ethernet, USB, OTG, CAN
• Maximum Clock Frequency: 120 MHz
• Number Of Programmable I/os: 70
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• On-chip Dac: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4966; 935290522551

NXP Semiconductors
UM10360
User manual
34.3.2.8 Programming hints for the synchronization primitives
To perform a guaranteed read-modify-write of a memory location, software must:
Software can use the synchronization primitives to implement a semaphores as follows:
The Cortex-M3 includes an exclusive access monitor, that tags the fact that the processor
has executed a Load-Exclusive instruction.
The processor removes its exclusive access tag if:
For more information about the synchronization primitive instructions, see
Section 34.2.4.8 “LDREX and STREX”
ANSI C cannot directly generate the exclusive access instructions. Some C compilers
provide intrinsic functions for generation of these instructions:
Table 638.
The actual exclusive access instruction generated depends on the data type of the pointer
passed to the intrinsic function. For example, the following C code generates the require
LDREXB operation:
__ldrex((volatile char *) 0xFF);
Instruction
LDREX , LDREXH , or LDREXB
STREX , STREXH , or STREXB
CLREX
1. Use a Load-Exclusive instruction to read the value of the location.
2. Update the value, as required.
3. Use a Store-Exclusive instruction to attempt to write the new value back to the
1. Use a Load-Exclusive instruction to read from the semaphore address to check
2. If the semaphore is free, use a Store-Exclusive to write the claim value to the
3. If the returned status bit from step 2 indicates that the Store-Exclusive succeeded
•
•
•
memory location, and tests the returned status bit. If this bit is:
– 0: The read-modify-write completed successfully,
– 1: No write was performed. This indicates that the value returned at step 1 might
whether the semaphore is free.
semaphore address.
then the software has claimed the semaphore. However, if the Store-Exclusive failed,
another process might have claimed the semaphore after the software performed
step 1.
It executes a CLREX instruction
It executes a Store-Exclusive instruction, regardless of whether the write succeeds.
An exception occurs. This means the processor can resolve semaphore conflicts
between different threads.
be out of date. The software must retry the read-modify-write sequence,
C compiler intrinsic functions for exclusive access instructions
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 19 August 2010
Intrinsic function
unsigned int __ldrex(volatile void *ptr)
int __strex(unsigned int val, volatile void *ptr)
void __clrex(void)
and
Chapter 34: Appendix: Cortex-M3 user guide
Section
34.2.4.9.
UM10360
© NXP B.V. 2010. All rights reserved.
744 of 840