LPC1769FBD100,551 NXP Semiconductors, LPC1769FBD100,551 Datasheet - Page 105

IC ARM CORTEX MCU 512K 100-LQFP

LPC1769FBD100,551

Manufacturer Part Number
LPC1769FBD100,551
Description
IC ARM CORTEX MCU 512K 100-LQFP
Manufacturer
NXP Semiconductors
Series
LPC17xxr

Specifications of LPC1769FBD100,551

Program Memory Type
FLASH
Program Memory Size
512KB (512K x 8)
Package / Case
100-LQFP
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
120MHz
Connectivity
CAN, Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
70
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 3.6 V
Data Converters
A/D 8x12b, D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC17
Core
ARM Cortex M3
Data Bus Width
32 bit
Data Ram Size
64 KB
Interface Type
Ethernet, USB, OTG, CAN
Maximum Clock Frequency
120 MHz
Number Of Programmable I/os
70
Number Of Timers
4
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 8 Channel
On-chip Dac
10 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4966
935290522551

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LPC1769FBD100,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
8.4 Pin mode select register values
UM10360
User manual
The direction control bit in the GPIO registers is effective only when the GPIO function is
selected for a pin. For other functions, direction is controlled automatically. Each
derivative typically has a different pinout and therefore a different set of functions possible
for each pin. Details for a specific derivative may be found in the appropriate data sheet.
Multiple connections
Since a particular peripheral function may be allowed on more than one pin, it is in
principle possible to configure more than one pin to perform the same function. If a
peripheral output function is configured to appear on more than one pin, it will in fact be
routed to those pins. If a peripheral input function is configured to appear on more than
one pin for some reason, the peripheral will receive its input from the lowest port number.
For instance, any pin of port 0 will take precedence over any pin of a higher numbered
port, and pin 0 of any port will take precedence over a higher numbered pin of the same
port.
The PINMODE registers control the input mode of all ports. This includes the use of the
on-chip pull-up/pull-down resistor feature and a special open drain operating mode. The
on-chip pull-up/pull-down resistor can be selected for every port pin regardless of the
function on this pin with the exception of the I
pins (see
PINMODE register, and an additional one in a PINMODE_OD register. Bits are reserved
for unused pins as in the PINSEL registers.
Table 76.
Repeater mode enables the pull-up resistor if the pin is at a logic high and enables the
pull-down resistor if the pin is at a logic low. This causes the pin to retain its last known
state if it is configured as an input and is not driven externally. The state retention is not
applicable to the Deep Power-down mode. Repeater mode may typically be used to
prevent a pin from floating (and potentially using significant power if it floats to an
indeterminate state) if it is temporarily not driven.
The PINMODE_OD registers control the open drain mode for ports. The open drain mode
causes the pin to be pulled low normally if it is configured as an output and the data value
is 0. If the data value is 1, the output drive of the pin is turned off, equivalent to changing
the pin direction. This combination simulates an open drain output.
Table 77.
PINMODE0 to
PINMODE9 Values
00
01
10
11
PINMODE_OD0 to
PINMODE_OD4
Values
0
1
Section
Pin Mode Select register Bits
Open Drain Pin Mode Select register Bits
All information provided in this document is subject to legal disclaimers.
8.5.10). Three bits are used to control the mode of a port pin, two in a
Function
Pin is in the normal (not open drain) mode.
Pin is in the open drain mode.
Function
Pin has an on-chip pull-up resistor enabled.
Repeater mode (see text below).
Pin has neither pull-up nor pull-down resistor enabled.
Pin has an on-chip pull-down resistor enabled.
Rev. 2 — 19 August 2010
2
C pins for the I2C0 interface and the USB
Chapter 8: LPC17xx Pin connect block
UM10360
© NXP B.V. 2010. All rights reserved.
00
Value after
Reset
Value after
Reset
00
105 of 840

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