LPC1769FBD100,551 NXP Semiconductors, LPC1769FBD100,551 Datasheet - Page 383

• Manufacturer Part Number: LPC1769FBD100,551
• Description: IC ARM CORTEX MCU 512K 100-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC17xxr

Specifications of LPC1769FBD100,551

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 100-LQFP
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 120MHz
• Connectivity: CAN, Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 70
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 8x12b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC17
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: Ethernet, USB, OTG, CAN
• Maximum Clock Frequency: 120 MHz
• Number Of Programmable I/os: 70
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• On-chip Dac: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4966; 935290522551

NXP Semiconductors
UM10360
User manual
receive interrupt whenever a CAN message is accepted and received. Software has to
move the received message out of the receive buffer from the according CAN controller
into the user RAM.
To cover dashboard like applications where the controller typically receives data from
several CAN channels for further processing, the CAN Gateway block was extended by a
so-called FullCAN receive function. This additional feature uses an internal message
handler to move received FullCAN messages from the receive buffer of the according
CAN controller into the FullCAN message object data space of Look-up Table RAM.
When FullCAN mode is enabled, the Acceptance Filter itself takes care of receiving and
storing messages for selected Standard ID values on selected CAN buses, in the style of
“FullCAN” controllers.
In order to set this bit and use this mode, two other conditions must be met with respect to
the contents of Acceptance Filter RAM and the pointers into it:
When these conditions are met and eFCAN is set:
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The Standard Frame Individual Start Address Register (SFF_sa) must be greater than
or equal to the number of IDs for which automatic receive storage is to be done, times
two. SFF_sa must be rounded up to a multiple of 4 if necessary.
The EndOfTable register must be less than or equal to 0x800 minus 6 times the
SFF_sa value, to allow 12 bytes of message storage for each ID for which automatic
receive storage will be done.
The area between the start of Acceptance Filter RAM and the SFF_sa address, is
used for a table of individual Standard IDs and CAN Controller/bus identification,
sorted in ascending order and in the same format as in the Individual Standard ID
table (see
page
there are an odd number of “FullCAN” ID’s, at least one entry in this table must be so
marked.
The first (SFF_sa)/2 IDindex values are assigned to these automatically-stored ID’s.
That is, IDindex values stored in the Rx Frame Status Register, for IDs not handled in
this way, are increased by (SFF_sa)/2 compared to the values they would have when
eFCAN is 0.
When a Standard ID is received, the Acceptance Filter searches this table before the
Standard Individual and Group tables.
When a message is received for a controller and ID in this table, the Acceptance filter
reads the received message out of the CAN controller and stores it in Acceptance
Filter RAM, starting at (EndOfTable) + its IDindex*12.
The format of such messages is shown in
375). Entries can be marked as “disabled” as in the other Standard tables. If
Figure 58 “Entry in FullCAN and individual standard identifier tables” on
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 19 August 2010
Table
353.
Chapter 16: LPC17xx CAN1/2
UM10360
© NXP B.V. 2010. All rights reserved.
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