LPC1769FBD100,551 NXP Semiconductors, LPC1769FBD100,551 Datasheet - Page 107

• Manufacturer Part Number: LPC1769FBD100,551
• Description: IC ARM CORTEX MCU 512K 100-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC17xxr

Specifications of LPC1769FBD100,551

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 100-LQFP
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 120MHz
• Connectivity: CAN, Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 70
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 8x12b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC17
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: Ethernet, USB, OTG, CAN
• Maximum Clock Frequency: 120 MHz
• Number Of Programmable I/os: 70
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• On-chip Dac: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4966; 935290522551

NXP Semiconductors
8.5 Register description
UM10360
User manual
The Pin Control Module contains 11 registers as shown in
Table 78.
[1]
Pin control module register reset values
On external reset, watchdog reset, power-on-reset (POR), and BOD reset, all registers in
this module are reset to '0'.
Name
PINSEL0
PINSEL1
PINSEL2
PINSEL3
PINSEL4
PINSEL7
PINSEL8
PINSEL9
PINSEL10
PINMODE0
PINMODE1
PINMODE2
PINMODE3
PINMODE4
PINMODE5
PINMODE6
PINMODE7
PINMODE9
PINMODE_OD0
PINMODE_OD1
PINMODE_OD2
PINMODE_OD3
PINMODE_OD4
I2CPADCFG
Reset Value reflects the data stored in used bits only. It does not include reserved bits content.
Pin Connect Block Register Map
All information provided in this document is subject to legal disclaimers.
Description
Pin function select register 0.
Pin function select register 1.
Pin function select register 2.
Pin function select register 3.
Pin function select register 4
Pin function select register 7
Pin function select register 8
Pin function select register 9
Pin function select register 10
Pin mode select register 0
Pin mode select register 1
Pin mode select register 2
Pin mode select register 3.
Pin mode select register 4
Pin mode select register 5
Pin mode select register 6
Pin mode select register 7
Pin mode select register 9
Open drain mode control register 0
Open drain mode control register 1
Open drain mode control register 2
Open drain mode control register 3
Open drain mode control register 4
I
2
C Pin Configuration register
Rev. 2 — 19 August 2010
Chapter 8: LPC17xx Pin connect block
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Table 78
Reset
Value
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
below.
UM10360
[1]
© NXP B.V. 2010. All rights reserved.
Address
0x4002 C000
0x4002 C004
0x4002 C008
0x4002 C00C
0x4002 C010
0x4002 C01C
0x4002 C020
0x4002 C024
0x4002 C028
0x4002 C040
0x4002 C044
0x4002 C048
0x4002 C04C
0x4002 C050
0x4002 C054
0x4002 C058
0x4002 C05C
0x4002 C064
0x4002 C068
0x4002 C06C
0x4002 C070
0x4002 C074
0x4002 C078
0x4002 C07C
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