LPC1769FBD100,551 NXP Semiconductors, LPC1769FBD100,551 Datasheet - Page 589

• Manufacturer Part Number: LPC1769FBD100,551
• Description: IC ARM CORTEX MCU 512K 100-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC17xxr

Specifications of LPC1769FBD100,551

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 100-LQFP
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 120MHz
• Connectivity: CAN, Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 70
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 8x12b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC17
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: Ethernet, USB, OTG, CAN
• Maximum Clock Frequency: 120 MHz
• Number Of Programmable I/os: 70
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• On-chip Dac: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4966; 935290522551

NXP Semiconductors
Table 542. Endian behavior
UM10360
User manual
Source
endian
Little
Little
Little
Little
Little
Little
Little
Little
Little
Big
Destination
endian
Little
Little
Little
Little
Little
Little
Little
Little
Little
Big
Source
width
8
8
32
8
8
16
16
16
32
32
All information provided in this document is subject to legal disclaimers.
Destination
width
8
16
32
8
16
32
8
16
32
8
Rev. 2 — 19 August 2010
Source
transfer
no/byte lane
1/[7:0]
2/[15:8]
3/[23:16]
4/[31:24]
1/[7:0]
2/[15:8]
3/[23:16]
4/[31:24]
1/[7:0]
2/[15:8]
3/[23:16]
4/[31:24]
1/[7:0]
1/[15:8]
2/[23:16]
2/[31:24]
1/[7:0]
1/[15:8]
2/[23:16]
2/[31:24]
1/[7:0]
1/[15:8]
2/[23:16]
2/[31:24]
1/[7:0]
1/[15:8]
1/[23:16]
1/[31:24]
1/[7:0]
1/[15:8]
1/[23:16]
1/[31:24]
1/[7:0]
1/[15:8]
1/[23:16]
1/[31:24]
1/[31:24]
2/[23:16]
3/[15:8]
4/[7:0]
Chapter 31: LPC17xx General Purpose DMA (GPDMA)
Source data Destination
21
43
65
87
21
43
65
87
21
43
65
87
21
43
65
87
21
43
65
87
21
43
65
87
21
43
65
87
21
43
65
87
21
43
65
87
12
34
56
78
transfer
no/byte lane
1/[7:0]
2/[15:8]
3/[23:16]
4/[31:24]
1/[15:0]
2/[31:16]
1/[31:0]
1/[7:0]
2/[15:8]
3/[23:16]
4/[31:24]
1/[15:0]
2/[31:16]
1/[31:0]
1/[7:0]
2/[15:8]
3/[23:16]
4/[31:24]
1/[15:0]
2/[31:16]
1/[31:0]
1/[31:24]
2/[23:16]
3/[15:8]
4/[7:0]
UM10360
© NXP B.V. 2010. All rights reserved.
Destination data
21212121
43434343
65656565
87878787
43214321
87658765
87654321
21212121
43434343
65656565
87878787
43214321
87658765
87654321
21212121
43434343
65656565
87878787
43214321
87658765
87654321
12121212
34343434
56565656
78787878
589 of 840