LPC1769FBD100,551 NXP Semiconductors, LPC1769FBD100,551 Datasheet - Page 118
LPC1769FBD100,551
Manufacturer Part Number
LPC1769FBD100,551
Description
IC ARM CORTEX MCU 512K 100-LQFP
Manufacturer
NXP Semiconductors
Series
LPC17xxr
Datasheets
1.OM11043.pdf
(79 pages)
2.LPC1767FBD100551.pdf
(2 pages)
3.LPC1767FBD100551.pdf
(840 pages)
4.LPC1769FBD100551.pdf
(66 pages)
Specifications of LPC1769FBD100,551
Program Memory Type
FLASH
Program Memory Size
512KB (512K x 8)
Package / Case
100-LQFP
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
120MHz
Connectivity
CAN, Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
70
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 3.6 V
Data Converters
A/D 8x12b, D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC17
Core
ARM Cortex M3
Data Bus Width
32 bit
Data Ram Size
64 KB
Interface Type
Ethernet, USB, OTG, CAN
Maximum Clock Frequency
120 MHz
Number Of Programmable I/os
70
Number Of Timers
4
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 8 Channel
On-chip Dac
10 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4966
935290522551
935290522551
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC1769FBD100,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
- OM11043 PDF datasheet
- LPC1767FBD100551 PDF datasheet #2
- LPC1767FBD100551 PDF datasheet #3
- LPC1769FBD100551 PDF datasheet #4
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- Download datasheet (6Mb)
NXP Semiconductors
UM10360
User manual
8.5.19 Open Drain Pin Mode select register 3 (PINMODE_OD3 - 0x4002 C074)
8.5.20 Open Drain Pin Mode select register 4 (PINMODE_OD4 - 0x4002 C078)
Table 96.
[1]
This register controls the open drain mode for Port 3 pins. For details see
mode select register
Table 97.
[1]
This register controls the open drain mode for Port 4 pins. For details see
mode select register
Table 98.
PINMODE
_OD2
5
6
7
8
9
10
11
12
13
31:14
PINMODE
_OD3
24:0
25
26
31:27
PINMODE
_OD4
27:0
Not available on 80-pin package.
Not available on 80-pin package.
Open Drain Pin Mode select register 2 (PINMODE_OD2 - address 0x4002 C070) bit
description
Open Drain Pin Mode select register 3 (PINMODE_OD3 - address 0x4002 C074) bit
description
Open Drain Pin Mode select register 4 (PINMODE_OD4 - address 0x4002 C078) bit
description
Symbol
P2.05OD
P2.06OD
P2.07OD
P2.08OD
P2.09OD
P2.10OD
P2.11OD
P2.12OD
P2.13OD
-
Symbol
-
P3.25OD
P3.26OD
-
Symbol
-
All information provided in this document is subject to legal disclaimers.
[1]
[1]
[1]
[1]
[1]
values”.
values”.
Rev. 2 — 19 August 2010
Value Description
Value Description
0
1
Value Description
Port 2 pin 5 open drain mode control, see P2.00OD
Port 2 pin 6 open drain mode control, see P2.00OD
Port 2 pin 7 open drain mode control, see P2.00OD
Port 2 pin 8 open drain mode control, see P2.00OD
Port 2 pin 9 open drain mode control, see P2.00OD
Port 2 pin 10 open drain mode control, see P2.00OD
Port 2 pin 11 open drain mode control, see P2.00OD
Port 2 pin 12 open drain mode control, see P2.00OD
Port 2 pin 13 open drain mode control, see P2.00OD
Reserved.
Reserved.
Port 3 pin 0 open drain mode control.
P3.25 pin is in the normal (not open drain) mode.
P3.25 pin is in the open drain mode.
Port 3 pin 26 open drain mode control, see P3.25OD
Reserved.
Reserved.
Chapter 8: LPC17xx Pin connect block
UM10360
© NXP B.V. 2010. All rights reserved.
Section 8.4 “Pin
Section 8.4 “Pin
118 of 840
Reset
value
0
0
0
0
0
0
0
0
0
NA
Reset
value
NA
0
0
NA
Reset
value
NA
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