LPC1769FBD100,551 NXP Semiconductors, LPC1769FBD100,551 Datasheet - Page 535

• Manufacturer Part Number: LPC1769FBD100,551
• Description: IC ARM CORTEX MCU 512K 100-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC17xxr

Specifications of LPC1769FBD100,551

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 100-LQFP
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 120MHz
• Connectivity: CAN, Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 70
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 8x12b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC17
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: Ethernet, USB, OTG, CAN
• Maximum Clock Frequency: 120 MHz
• Number Of Programmable I/os: 70
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• On-chip Dac: 10 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4966; 935290522551

NXP Semiconductors
Table 475. MCPWM Dead-time register (MCDT - address 0x400B 803C) bit description
Table 476. MCPWM Commutation Pattern register (MCCP - address 0x400B 8040) bit description
UM10360
User manual
Bit
9:0
19:10
29:20
31:30
Bit
0
1
2
3
4
5
31:6
Symbol
CCPA0
CCPB0
CCPA1
CCPB1
CCPA2
CCPB2
-
Symbol
DT0
DT1
DT2
-
25.7.8 MCPWM Dead-time register (MCDT - 0x400B 803C)
25.7.9 MCPWM Commutation Pattern register (MCCP - 0x400B 8040)
Description
0 = MCOA0 passive, 1 = internal MCOA0.
0 = MCOB0 passive, 1 = MCOB0 tracks internal MCOA0.
0 = MCOA1 passive, 1 = MCOA1 tracks internal MCOA0.
0 = MCOB1 passive, 1 = MCOB1 tracks internal MCOA0.
0 = MCOA2 passive, 1 = MCOA2 tracks internal MCOA0.
0 = MCOB2 passive, 1 = MCOB2 tracks internal MCOA0.
Reserved.
This register holds the dead-time values for the three channels. If a channel’s DTE bit in
MCCON is 1 to enable its dead-time counter, the counter counts down from this value
whenever one its channel’s outputs changes from “active” to “passive” state. When the
dead-time counter reaches 0, the channel changes its other output from “passive” to
“active” state.
The motivation for the dead-time feature is that power transistors, like those driven by the
A and B outputs in a motor-control application, take longer to fully turn off than they take to
start to turn on. If the A and B transistors are ever turned on at the same time, a wasteful
and damaging current will flow between the power rails through the transistors. In such
applications, the dead-time register should be programmed with the number of PCLK
periods that is greater than or equal to the transistors’ maximum turn-off time minus their
minimum turn-on time.
[1]
[2]
This register is used in DC mode only. The internal MCOA0 signal is routed to any or all of
the six output pins under the control of the bits in this register. Like the Match and Limit
registers, this register has “write” and “operational” versions. See
more about this subject.
If ACMODE is 1 selecting AC-mode, this field controls the dead time for all three channels.
If ACMODE is 0.
Description
Dead time for channel 0.
Dead time for channel 1.
Dead time for channel 2.
reserved
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 19 August 2010
[1]
[2]
[2]
Chapter 25: LPC17xx Motor control PWM
25.7.6
UM10360
© NXP B.V. 2010. All rights reserved.
and
Reset value
0x3FF
0x3FF
0x3FF
25.8.2
Reset value
0
0
0
0
0
0
535 of 840
for