EZ80F91MCU ZILOG [Zilog, Inc.], EZ80F91MCU Datasheet - Page 91

• Manufacturer Part Number: EZ80F91MCU
• Description: eZ80Acclaim-TM Flash Microcontrollers
• Manufacturer: ZILOG [Zilog, Inc.]

eZ80F91 MCU
Product Specification
72
GPIO Port Interrupts
All interrupts are latched. In effect, an interrupt is held even if the interrupt occurs
while another interrupt is being serviced and interrupts are disabled, or if the inter-
rupt is of a lower priority. However, before the latched ISR completes its task or
reenables interrupts, the ISR must clear the interrupt. For on-chip peripherals, the
interrupt is cleared when the data register is accessed. For GPIO-level interrupts,
the interrupt signal must be removed before the ISR completes its task. For GPIO-
edge interrupts (single and dual), the interrupt is cleared by writing a 1 to the cor-
responding bit position in the data register. See the
Edge-Triggered Interrupts
section on page 62.
Care must be taken using a GPIO data register when it is configured for inter-
Note:
rupts. For edge-interrupt modes (Modes 6 and 9) as discussed above, writing a 1
clears the interrupt. However, a 1 in the data register also conveys a particular
configuration. For example, when the data register Px_DR is set first, followed by
the Px_ALT2, Px_ALT1, and Px_DDR registers, then the configuration is per-
formed correctly. Writing a 1 to the register later to clear interrupts does not
change the configuration.
In Mode 9 operation, if the GPIO is already configured for Mode 9 and the trigger
edge must be changed (from falling to rising or from rising to falling), the configu-
ration must be changed to another mode, such as Mode 2, and then changed
back to Mode 9. For example, enter Mode 2 by writing the registers in the
sequence PxDR, Px_ALT2, Px_ALT1, Px_DDR. Next, change back to Mode 9 by
writing the registers in the sequence PxDR, Px_ALT2, Px_ALT1, Px_DDR.
In Mode 8 operation, if the GPIO is configured for level-sensitive interrupts, a
Write value to Px_DR after configuration must be the same Write value used
when configuring the GPIO.
PS019209-0504
P R E L I M I N A R Y
Interrupt Controller