EZ80F91MCU ZILOG [Zilog, Inc.], EZ80F91MCU Datasheet - Page 57

• Manufacturer Part Number: EZ80F91MCU
• Description: eZ80Acclaim-TM Flash Microcontrollers
• Manufacturer: ZILOG [Zilog, Inc.]

Table 3. Register Map (Continued)
PS019209-0504
Address
(hex)
Ethernet Media Access Controller, continued
0047
0048
0049
004A
004B
004C
004D
004E
004F
0050
0051
0052
0053
0054
0055
Notes:
1. After an external pin reset, the Watch-Dog Timer Control register is reset to 00h. After a Watch-Dog Timer time-
2. When the CPU reads this register, the current sampled value of the port is read.
3. Read Only if RTC is locked; Read/Write if RTC is unlocked.
4. After an external pin reset or a Watch-Dog Timer reset, the RTC Control register is reset to x0xxxx00b. After a
5. Read Only if Flash Memory is locked. Read/Write if Flash Memory is unlocked.
out reset, the Watch-Dog Timer Control register is reset to 20h.
an RTC Alarm sleep-mode recovery reset, the RTC Control register is reset to x0xxxx10b.
Mnemonic
EMAC_RHBP_L
EMAC_RHBP_H
EMAC_RRP_L
EMAC_RRP_H
EMAC_BUFSZ
EMAC_IEN
EMAC_ISTAT
EMAC_PRSD_L
EMAC_PRSD_H
EMAC_MIISTAT
EMAC_RWP_L
EMAC_RWP_H
EMAC_TRP_L
EMAC_TRP_H
EMAC_BLKSLFT_L
Name
EMAC Receive High Boundary
Pointer—Low Byte
EMAC Receive High Boundary
Pointer—High Byte
EMAC Receive Read Pointer—Low
Byte
EMAC Receive Read Pointer—High
Byte
EMAC Buffer Size Register
EMAC Interrupt Enable Register
EMAC Interrupt Status Register
EMAC PHY Read Status Data—Low
Byte
EMAC PHY Read Status Data—High
Byte
EMAC MII Status Register
EMAC Receive Write Pointer—Low
Byte
EMAC Receive Write Pointer—High
Byte
EMAC Transmit Read Pointer—Low
Byte
EMAC Transmit Read Pointer—High
Byte
EMAC Receive Blocks Left Register—
Low Byte
P R E L I M I N A R Y
Reset
(hex)
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
Product Specification
Access
eZ80F91 MCU
CPU
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Register Map
Page
272
273
273
274
274
275
277
278
279
279
280
281
281
282
282
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