EZ80F91MCU ZILOG [Zilog, Inc.], EZ80F91MCU Datasheet - Page 63

• Manufacturer Part Number: EZ80F91MCU
• Description: eZ80Acclaim-TM Flash Microcontrollers
• Manufacturer: ZILOG [Zilog, Inc.]

Table 3. Register Map (Continued)
PS019209-0504
Address
(hex)
General-Purpose Input/Output Ports, continued
009B
009C
009D
009E
009F
00A0
00A1
00A2
00A3
00A4
00A5
Chip Select/Wait State Generator
00A8
00A9
00AA
00AB
00AC
00AD
00AE
00AF
00B0
00B1
Notes:
1. After an external pin reset, the Watch-Dog Timer Control register is reset to 00h. After a Watch-Dog Timer time-
2. When the CPU reads this register, the current sampled value of the port is read.
3. Read Only if RTC is locked; Read/Write if RTC is unlocked.
4. After an external pin reset or a Watch-Dog Timer reset, the RTC Control register is reset to x0xxxx00b. After a
5. Read Only if Flash Memory is locked. Read/Write if Flash Memory is unlocked.
out reset, the Watch-Dog Timer Control register is reset to 20h.
an RTC Alarm sleep-mode recovery reset, the RTC Control register is reset to x0xxxx10b.
Mnemonic
PB_DDR
PB_ALT1
PB_ALT2
PC_DR
PC_DDR
PC_ALT1
PC_ALT2
PD_DR
PD_DDR
PD_ALT1
PD_ALT2
CS0_LBR
CS0_UBR
CS0_CTL
CS1_LBR
CS1_UBR
CS1_CTL
CS2_LBR
CS2_UBR
CS2_CTL
CS3_LBR
Name
Port B Data Direction Register
Port B Alternate Register 1
Port B Alternate Register 2
Port C Data Register
Port C Data Direction Register
Port C Alternate Register 1
Port C Alternate Register 2
Port D Data Register
Port D Data Direction Register
Port D Alternate Register 1
Port D Alternate Register 2
Chip Select 0 Lower Bound Register
Chip Select 0 Upper Bound Register
Chip Select 0 Control Register
Chip Select 1 Lower Bound Register
Chip Select 1 Upper Bound Register
Chip Select 1 Control Register
Chip Select 2 Lower Bound Register
Chip Select 2 Upper Bound Register
Chip Select 2 Control Register
Chip Select 3 Lower Bound Register
P R E L I M I N A R Y
Reset
(hex)
XX
XX
FF
FF
FF
FF
E8
00
00
00
00
00
00
00
00
00
00
00
00
00
00
Product Specification
Access
R/W
R/W
eZ80F91 MCU
CPU
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
2
2
Register Map
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