EZ80F91MCU ZILOG [Zilog, Inc.], EZ80F91MCU Datasheet - Page 142

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EZ80F91MCU

Manufacturer Part Number
EZ80F91MCU
Description
eZ80Acclaim-TM Flash Microcontrollers
Manufacturer
ZILOG [Zilog, Inc.]
Datasheet
PS019209-0504
Watch-Dog Timer Operation
Enabling and Disabling the WDT
The Watch-Dog Timer is disabled upon a RESET. To enable the WDT, the applica-
tion program must set WDT_EN, which corresponds to bit 7 of the WDT_CTL reg-
ister. After WDT_EN is set, no Writes are allowed to the WDT_CTL register. When
enabled, the WDT cannot be disabled, except by a RESET.
Time-Out Period Selection
There are four choices of time-out periods for the WDT—2
timer clock cycles. The WDT time-out period is defined by the WDT_PERIOD field
of the WDT_CTL register (WDT_CTL[1:0]). The approximate time-out periods for
two different WDT clock sources are listed in Table 46. The approximate time-out
period for the third WDT clock source is listed in Table 47.
Table 46. Watch-Dog Timer Approximate Time-Out Delays
Table 47. Watch-Dog Timer Approximate Time-Out Delays w/ Internal RC Oscillator
Clock Source
32.768 KHz Crystal Oscillator
32.768 KHz Crystal Oscillator
32.768 KHz Crystal Oscillator
32.768 KHz Crystal Oscillator
50 MHz System Clock
50 MHz System Clock
50 MHz System Clock
50 MHz System Clock
Clock Source
Internal RC Oscillator
Internal RC Oscillator
Internal RC Oscillator
Internal RC Oscillator
P R E L I M I N A R Y
Divider
Value
2
2
2
2
18
22
25
27
Divider
Value
2
2
2
2
2
2
2
2
18
22
25
27
18
22
25
27
Time-Out Delay
Minimum
2100 s
8390s
262s
Time Out
16s
83.9 ms
1024 s
4096 s
5.2 ms
Delay
8.00 s
0.67 s
2.68 s
128 s
Time-Out Delay
Product Specification
18
Typical
13400s
3360s
, 2
419s
26 s
22
, 2
eZ80F91 MCU
Watch-Dog Timer
25
, and 2
27
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