EZ80F91MCU ZILOG [Zilog, Inc.], EZ80F91MCU Datasheet - Page 73

• Manufacturer Part Number: EZ80F91MCU
• Description: eZ80Acclaim-TM Flash Microcontrollers
• Manufacturer: ZILOG [Zilog, Inc.]

Low Power Modes
PS019209-0504
Overview
SLEEP Mode
HALT Mode
The eZ80F91 device provides a range of power-saving features. The highest level
of power reduction is provided by SLEEP mode. The next level of power reduction
is provided by the HALT instruction. The most basic level of power reduction is
provided by the clock peripheral power-down registers.
Execution of the CPU’s SLP instruction places the eZ80F91 device into SLEEP
mode. In SLEEP mode, the operating characteristics are:
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•
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The CPU can be brought out of SLEEP mode by any of the following operations:
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After exiting SLEEP mode, the standard RESET delay occurs to allow the primary
crystal oscillator to stabilize. Refer to the
mation.
Execution of the CPU’s HALT instruction places the eZ80F91 device into HALT
mode. In HALT mode, the operating characteristics are:
•
The primary crystal oscillator is disabled
The system clock is disabled
The CPU is idle
The Program Counter (PC) stops incrementing
The 32 KHz crystal oscillator continues to operate and drive the Real-Time
Clock and the Watch-Dog Timer (if WDT is configured to operate from the
32 KHz oscillator)
A RESET via the external RESET pin driven Low
A RESET via a Real-Time Clock alarm
A RESET via a Watch-Dog Timer time-out (if running off of the 32 KHz oscilla-
tor and configured to generate a RESET upon time-out)
A RESET via execution of a Debug RESET command
The primary crystal oscillator is enabled and continues to operate
P R E L I M I N A R Y
Reset
section on page 51 for more infor-
Product Specification
Low Power Modes
eZ80F91 MCU
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