EZ80F91MCU ZILOG [Zilog, Inc.], EZ80F91MCU Datasheet - Page 29

• Manufacturer Part Number: EZ80F91MCU
• Description: eZ80Acclaim-TM Flash Microcontrollers
• Manufacturer: ZILOG [Zilog, Inc.]

Table 2. Pin Identification on the eZ80F91 Device (Continued)
PS019209-0504
LQFP
Pin #
21
22
23
24
25
26
Note: *PHY represents the physical layer of the OSI model.
BGA
Pin#
G1
G2
G3
F5
H1
H2
Symbol
ADDR16
V
V
ADDR17
ADDR18
ADDR19
DD
SS
Function
Address Bus
Power Supply
Ground
Address Bus
Address Bus
Address Bus
P R E L I M I N A R Y
Signal Direction
Bidirectional
Bidirectional
Bidirectional
Bidirectional
Description
Configured as an output in
normal operation. The address
bus selects a location in memory
or I/O space to be read or written.
Configured as an input during bus
acknowledge cycles. Drives the
Chip Select/Wait State Generator
block to generate Chip Selects.
Power Supply.
Ground.
Configured as an output in
normal operation. The address
bus selects a location in memory
or I/O space to be read or written.
Configured as an input during bus
acknowledge cycles. Drives the
Chip Select/Wait State Generator
block to generate Chip Selects.
Configured as an output in
normal operation. The address
bus selects a location in memory
or I/O space to be read or written.
Configured as an input during bus
acknowledge cycles. Drives the
Chip Select/Wait State Generator
block to generate Chip Selects.
Configured as an output in
normal operation. The address
bus selects a location in memory
or I/O space to be read or written.
Configured as an input during bus
acknowledge cycles. Drives the
Chip Select/Wait State Generator
block to generate Chip Selects.
Product Specification
Architectural Overview
eZ80F91 MCU
10