EZ80F91MCU ZILOG [Zilog, Inc.], EZ80F91MCU Datasheet - Page 343

• Manufacturer Part Number: EZ80F91MCU
• Description: eZ80Acclaim-TM Flash Microcontrollers
• Manufacturer: ZILOG [Zilog, Inc.]

PS019209-0504
Note:
The divider is designed such that any divider value less than 2 is ignored; a value
of 2 is used in its place.
The least-significant byte of PLL divider N is set via the corresponding bits in the
PLL_DIV_L register. See Tables 205 and 206.
The PLL divider register can only be written to when the PLL is disabled. A read-
back of the PLL Divider registers returns 0.
Table 205. PLL Divider Register—Low Bytes
(PLL_DIV_L = 005Ch)
Table 206. PLL Divider Register—High Bytes
(PLL_DIV_H = 005Dh)
Bit
Reset
CPU Access
Note: W = Write only.
Bit
Position
[7:0]
PLL_DIV_L
Bit
Reset
CPU Access
Note: R = Read only; R/W = Read/Write.
Bit
Position
[7:3]
[2:0]
PLL_DIV_H
Value
00h–
FFh
Value
00h
0h–7h
W
W
Description
These bits represent the Low byte of the 11-bit PLL divider
value. The complete PLL divider value is returned by
{PLL_DIV_H, PLL_DIV_L}.
Description
Reserved
These bits represent the High byte of the 11-bit PLL divider
value. The complete PLL divider value is returned by
{PLL_DIV_H, PLL_DIV_L}.
P R E L I M I N A R Y
7
0
7
0
W
W
6
0
6
0
W
W
5
0
5
0
W
W
4
0
4
0
W
W
3
0
3
0
Product Specification
W
W
2
0
2
0
Phase-Locked Loop
eZ80F91 MCU
W
W
1
1
1
0
W
W
0
0
0
0
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