EZ80F91MCU ZILOG [Zilog, Inc.], EZ80F91MCU Datasheet - Page 245

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EZ80F91MCU

Manufacturer Part Number
EZ80F91MCU
Description
eZ80Acclaim-TM Flash Microcontrollers
Manufacturer
ZILOG [Zilog, Inc.]
Datasheet
PS019209-0504
Table 119. I
If a repeated START condition is transmitted, the status code is
08h
After each data byte is transmitted, the IFLG is set to 1 and one of the status
codes listed in Table 120 is loaded into the I2C_SR register.
Code
38h
68h
B0h
D0h
D8h
Notes:
1. W is defined as the Write bit; i.e., the lsb is cleared to 0.
2. AAK is an I 2 C control bit that identifies which ACK signal to transmit.
3. R is defined as the Read bit; i.e., the lsb is set to 1.
.
I
Arbitration lost
Arbitration lost,
SLA+W received,
ACK transmitted
Arbitration lost,
SLA+R received,
ACK transmitted
Second address byte
+ W transmitted,
ACK received
Second address byte
+ W transmitted,
ACK not received
2
2
C 10-Bit Master Transmit Status Codes
C State
P R E L I M I N A R Y
1
3
Microcontroller Response
Clear IFLG
Or set STA, clear IFLG
Clear IFLG, clear AAK = 0
Or clear IFLG, set AAK = 1
Write byte to DATA,
clear IFLG, clear AAK = 0
Or write byte to DATA,
clear IFLG, set AAK = 1
Write byte to data,
clear IFLG
Or set STA, clear IFLG
Or set STP, clear IFLG
Or set STA & STP,
clear IFLG
Same as code D0h
2
Product Specification
Next I
Return to idle
Transmit START
when bus free
Receive data byte,
transmit NACK
Receive data byte,
transmit ACK
Transmit last byte,
receive ACK
Transmit data byte,
receive ACK
Transmit data byte,
receive ACK
Transmit repeated
START
Transmit STOP
Transmit STOP
then
START
Same as code D0h
I
2
10h
C Serial I/O Interface
eZ80F91 MCU
2
instead of
C Action
226

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