EZ80F91MCU ZILOG [Zilog, Inc.], EZ80F91MCU Datasheet - Page 346

• Manufacturer Part Number: EZ80F91MCU
• Description: eZ80Acclaim-TM Flash Microcontrollers
• Manufacturer: ZILOG [Zilog, Inc.]

Table 209. PLL Characteristics
PS019209-0504
Symbol
I
I
I
OHCP_OUT
OLCP_OUT
OHCP_OUT
PLL Characteristics
Note:
Parameter
High level output current for
CP_OUT pin (programmed
value 42%)
Low level output current for
CP_OUT pin (programmed
value 42%)
High level output current for
CP_OUT pin (programmed
value 42%)
The operating and testing characteristics for the PLL are described in Table 209.
Not all conditions are tested in production test. The values in Table 209 are for
design and characterization only.
Bit
Position
3
INT_UNLOCK
2
INT_LOCK_EN
1
INT_UNLOCK_
EN
0
PLL_ENABLE
Notes:
1. PLL cannot be disabled if the CLK_MUX bit of PLL_CTL0[1:0] is set to 01, because the PLL is
selected as the clock source.
Value Description
0
1
0
1
0
1
0
1
Lock signal from PLL has not fallen since last time register
was read
Interrupt generated when PLL goes out of lock. Held until
register is read.
Interrupt generation for PLL locked condition (Bit 4) is
disabled.
Interrupt generation for PLL locked condition is enabled.
Interrupt generation for PLL unlocked condition (Bit 3) is
disabled.
Interrupt generation for PLL unlocked condition is enabled.
PLL is disabled.
PLL is enabled.
P R E L I M I N A R Y
Test Condition
3.0 < V
0.6 < PD_OUT < V
PLL_CTL0[7:6] = 11
3.0 < V
0.6 < PD_OUT < V
PLL_CTL0[7:6] = 11
3.0 < V
0.6 < PD_OUT < V
PLL_CTL0[7:6] = 10
DD
DD
DD
< 3.6
<3.6
<3.6
1
DD
DD
DD
– 0.6
– 0.6
– 0.6
–0.86 –1.50 –2.13
–0.42
0.86
Min
Product Specification
1.50
–1.0
Typ
Phase-Locked Loop
eZ80F91 MCU
–1.42
Max
2.13
Units
mA
mA
mA
327