EZ80F91MCU ZILOG [Zilog, Inc.], EZ80F91MCU Datasheet - Page 345

• Manufacturer Part Number: EZ80F91MCU
• Description: eZ80Acclaim-TM Flash Microcontrollers
• Manufacturer: ZILOG [Zilog, Inc.]

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PS019209-0504
PLL Control Register 1
The PLL is enabled using this register. PLL lock-detect status, the PLL interrupt
signals and the PLL interrupt enables are accessed via this register. A brief
description of each of these PLL Control Register 1 attributes is listed below, and
further described in Table 208.
Lock Status (LCK_STATUS).
and can be read via this bit.
Interrupt Lock (INT_LOCK).
module and indicates that a rising edge on the lock signal out of the PLL has been
observed.
Interrupt Unlock (INT_UNLOCK).
gen module and indicates that a falling edge on the lock signal out of the PLL has
been observed.
Interrupt Lock Enable (INT_LOCK_EN).
Interrupt Unlock Enable (INT_UNLOCK_EN).
unlock bit.
PLL Enable (PLL_ENABLE).
Table 208. PLL Control Register 1
(PLL_CTL1 = 005Fh)
Bit
Reset
CPU Access
Note: R = Read Only; R/W = Read/Write.
Bit
Position
[7:6]
5
LCK_STATUS
4
INT_LOCK
Value Description
00
0
1
0
1
Reserved
PLL is currently out of lock.
PLL is currently locked.
Lock signal from PLL has not risen since last time register
was read.
Interrupt generated when PLL enters lock mode. Held until
register is read.
P R E L I M I N A R Y
R
7
0
This signal feeds the interrupt line out of the CLKGEN
Enables/disables the PLL.
The current lock bit out of the PLL is synchronized
This signal feeds the interrupt line out of the clk-
R
6
0
This signal enables the interrupt lock bit.
R
5
0
This signal enables the interrupt
R/W
4
0
R/W
3
0
Product Specification
R/W
2
0
Phase-Locked Loop
eZ80F91 MCU
R/W
1
0
R/W
0
0
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