EZ80F91MCU ZILOG [Zilog, Inc.], EZ80F91MCU Datasheet - Page 293

• Manufacturer Part Number: EZ80F91MCU
• Description: eZ80Acclaim-TM Flash Microcontrollers
• Manufacturer: ZILOG [Zilog, Inc.]

PS019209-0504
Table 169. EMAC Receive Read Pointer Register—High Byte
(EMAC_RRP_H = 004Ah)
EMAC Buffer Size Register
The lower six bits of this register set the level at which the EMAC either transmits
a pause control frame or jams the Ethernet bus, depending on the mode selected.
When these bits each contain a zero, this feature is disabled.
In Full Duplex Mode, a Pause Control Frame is transmitted as a one-shot opera-
tion. The software must free up a number of Rx buffers so that the number of buff-
ers remaining, EmacBlksLeft, is greater than TCPF_LEV.
In Half Duplex Mode, the EMAC jams the Ethernet by sending a continuous
stream of hexadecimal 5s (
the number of buffers remaining, EmacBlksLeft, is greater than TCPF_LEV, the
EMAC stops jamming.
Bit
Reset
CPU Access
Note: R = Read Only, R/W = Read/Write
Bit
Position
[7:0]
EMAC_RRP_
H
Value
00h–
FFh
Description
These bits represent the High byte of the 2-byte EMAC
Receive Read Pointer value, {EMAC_RRP_H,
EMAC_RRP_L}. Bit 7 is bit 15 (msb) of the 16-bit value. Bit 0
is bit 8 of the 16-bit value.
P R E L I M I N A R Y
R
7
0
5fh
). When the software frees up the Rx buffers and
R
6
0
R
5
0
R/W
4
0
R/W
Ethernet Media Access Controller
3
0
Product Specification
R/W
2
0
eZ80F91 MCU
R/W
1
0
R/W
0
0
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