EZ80F91MCU ZILOG [Zilog, Inc.], EZ80F91MCU Datasheet - Page 334

• Manufacturer Part Number: EZ80F91MCU
• Description: eZ80Acclaim-TM Flash Microcontrollers
• Manufacturer: ZILOG [Zilog, Inc.]

Table 204. Pin to Boundary Scan Cell Mapping (Continued)
PS019209-0504
Pin
WR
WR
RD
MREQ
MREQ
IORQ
IORQ
D7
D7
D6
D6
D5
D5
D4
D4
D3
D3
D2
D2
D1
D1
D0
D0
D0
CS3
Notes:
1. The address bits 0–7, 8–15, and 16–23 each share a single output enable. In this table, the output enables are
2. Direction on the data bus is controlled by a single output enable. It is shown in this table as being associated
3. MREQ,
shown to be associated with the least-significant bit that they control.
with D[0].
IORQ
, INSTRDN, RD, and WR share an output enable; it is associated in this table with WR.
Direction
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
OEN
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
OEN
Scan Cell #
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
11
P R E L I M I N A R Y
Pin
PA5
PA5
PA4
PA4
PA4
PA3
PA3
PA3
PA2
PA2
PA2
PA1
PA1
PA1
PA0
PA0
PA0
PHI
PHI
SCL
SCL
SDA
SDA
PB7
PB7
Direction
Output
Output
Output
Output
Output
Output
Output
Output
Output
Output
Product Specification
OEN
Input
OEN
Input
OEN
Input
OEN
Input
OEN
Input
OEN
OEN
Input
Input
Input
On-Chip Instrumentation
eZ80F91 MCU
Scan Cell #
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
315