EZ80F91MCU ZILOG [Zilog, Inc.], EZ80F91MCU Datasheet - Page 126

• Manufacturer Part Number: EZ80F91MCU
• Description: eZ80Acclaim-TM Flash Microcontrollers
• Manufacturer: ZILOG [Zilog, Inc.]

PS019209-0504
Memory Read
Programming Flash Memory
Note:
A memory Read operation uses the address bus and data bus of the eZ80F91
device to read a single data byte from Flash memory. This Read operation is sim-
ilar to reads from RAM. To perform Flash memory reads, the FLASH_CTRL regis-
ter must be configured to enable memory access to Flash with the appropriate
number of wait states. See
Only the main area of Flash memory is accessible via memory reads. The infor-
mation page must be read using I/O access.
I/O Read
A single-byte I/O Read operation uses I/O registers for setting the column, page,
and row address to be read. A Read of the FLASH_DATA register returns the con-
tents of Flash memory at the designated address. Each access to the
FLASH_DATA register causes an autoincrement of the Flash address stored in
the Flash address registers (FLASH_PAGE, FLASH_ROW, FLASH_COL). To
allow for Flash memory access time, the FLASH_CTRL register must be config-
ured with the appropriate number of wait states. See
Flash memory is programmed using standard I/O or memory Write operations that
the Flash memory controller automatically translates to the detailed timing and
protocol required for Flash memory. The more efficient multibyte (row) program-
ming mode is only available via I/O Writes.
To ensure data integrity and device reliability, two main restrictions exist on pro-
gramming of Flash memory:
1. The cumulative programming time since the last erase cannot exceed 31 ms
2. The same byte cannot be programmed more than twice since the last erase.
Single-Byte I/O Write
A single-byte I/O Write operation uses I/O registers for setting the column, page,
and row address to be written. The FLASH_DATA register stores the data to be
written. While the CPU executes an I/O instruction to load the data into the
FLASH_DATA register, the Flash controller asserts the internal WAIT signal to
stall the CPU until the Flash Write operation is complete. A single-byte Write takes
between 66 µs and 85 µs to complete. Programming an entire row (256 bytes)
using single-byte Writes therefore takes no more than 21.8 ms. This duration of
time does not include the time required by the CPU to transfer data to the regis-
ters, which is a function of the instructions employed and the system clock fre-
quency. Each access to the FLASH_DATA register causes an autoincrement of
for any given row.
P R E L I M I N A R Y
Table 37
on page 113.
Table 37
Product Specification
on page 113.
eZ80F91 MCU
Flash Memory
107