EZ80F91MCU ZILOG [Zilog, Inc.], EZ80F91MCU Datasheet - Page 217

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EZ80F91MCU

Manufacturer Part Number
EZ80F91MCU
Description
eZ80Acclaim-TM Flash Microcontrollers
Manufacturer
ZILOG [Zilog, Inc.]
Datasheet
PS019209-0504
Table 104. Parity Select Definition for Multidrop Communications
UART Modem Control Register
This register is used to control and check the modem status. See Table 105.
Table 105. UART Modem Control Registers
(UART0_MCTL = 00C4h, UART1_MCTL = 00D4h)
Note: *In Multidrop Mode, EPS resets to 0 after the
Bit
Reset
CPU Access
Note: R = Read Only; R/W = Read/Write.
Bit
Position
7
6
POLARITY
5
MDM
Multidrop
Mode
first character is sent.
0
0
1
1
Value
0
0
1
0
1
Even Parity
Select
1*
0
1
0
Description
Reserved
TxD and RxD signals—Normal Polarity.
Invert Polarity of TxD and RxD signals.
Multidrop Mode disabled.
Multidrop Mode enabled. See
definitions.
P R E L I M I N A R Y
R
7
0
R/W
Parity Type
6
0
space
mark
even
odd
R/W
5
0
Universal Asynchronous Receiver/Transmitter
R/W
4
0
Table 104
R/W
3
0
Product Specification
R/W
for parity select
2
0
eZ80F91 MCU
R/W
1
0
R/W
0
0
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