EZ80F91MCU ZILOG [Zilog, Inc.], EZ80F91MCU Datasheet - Page 125

• Manufacturer Part Number: EZ80F91MCU
• Description: eZ80Acclaim-TM Flash Microcontrollers
• Manufacturer: ZILOG [Zilog, Inc.]

Figure 23. Flash Memory Block Diagram
PS019209-0504
eZ80 Core
Interface
System Clock
Flash Memory Overview
Reading Flash Memory
The eZ80F91 device includes a Flash memory controller that automatically con-
verts standard CPU Read and Write cycles to the specific protocol required for the
Flash memory array. As such, standard memory Read and Write instructions
access the Flash memory array as if it is internal RAM. The controller also sup-
ports I/O access to the Flash memory array, in effect presenting it as an indirectly-
addressable bank of I/O registers. These access methods are also supported via
the ZDI and OCI interfaces.
In addition, eZ80Acclaim! Flash Microcontrollers support a Flash Read–While–
Write methodology. In essence, the eZ80
code from an area of Flash memory while a nonconflicting area of Flash memory
is being programmed.
The Flash memory controller contains a frequency divider, a Flash register inter-
face, and a Flash control state machine. A simplified block diagram of the Flash
controller is illustrated in Figure 23.
The main Flash memory array can be read using both Memory and I/O opera-
tions. As an auxiliary storage area, the information page is only accessible via I/O
operations. In all cases, wait states are automatically inserted to allow for read
access time.
ADDR
D
OUT
17
8
Registers
8-bit downcounter
Control
Flash
Clock Divider
P R E L I M I N A R Y
Machine
Flash
State
®
FADDR
FD
FCNTL
MAIN_INFO
CPU can continue to read and execute
CPUD
FLASH_IRQ
IN
OUT
17
8
9
8
Product Specification
512 bytes
256 KB
Flash
+
eZ80F91 MCU
Flash Memory
FD
OUT
8
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