EZ80F91MCU ZILOG [Zilog, Inc.], EZ80F91MCU Datasheet - Page 30

• Manufacturer Part Number: EZ80F91MCU
• Description: eZ80Acclaim-TM Flash Microcontrollers
• Manufacturer: ZILOG [Zilog, Inc.]

Table 2. Pin Identification on the eZ80F91 Device (Continued)
PS019209-0504
LQFP
Pin #
27
28
29
30
31
32
33
Note: *PHY represents the physical layer of the OSI model.
BGA
Pin#
G4
H3
J1
G5
J2
H4
J3
Symbol
ADDR20
ADDR21
ADDR22
ADDR23
V
V
CS0
DD
SS
Function
Address Bus
Address Bus
Address Bus
Address Bus
Power Supply
Ground
Chip Select 0
P R E L I M I N A R Y
Signal Direction
Bidirectional
Bidirectional
Bidirectional
Bidirectional
Output, Active Low
Description
Configured as an output in
normal operation. The address
bus selects a location in memory
or I/O space to be read or written.
Configured as an input during bus
acknowledge cycles. Drives the
Chip Select/Wait State Generator
block to generate Chip Selects.
Configured as an output in
normal operation. The address
bus selects a location in memory
or I/O space to be read or written.
Configured as an input during bus
acknowledge cycles. Drives the
Chip Select/Wait State Generator
block to generate Chip Selects.
Configured as an output in
normal operation. The address
bus selects a location in memory
or I/O space to be read or written.
Configured as an input during bus
acknowledge cycles. Drives the
Chip Select/Wait State Generator
block to generate Chip Selects.
Configured as an output in
normal operation. The address
bus selects a location in memory
or I/O space to be read or written.
Configured as an input during bus
acknowledge cycles. Drives the
Chip Select/Wait State Generator
block to generate Chip Selects.
Power Supply.
Ground.
CS0 Low indicates that an access
is occurring in the defined CS0
memory or I/O address space.
Product Specification
Architectural Overview
eZ80F91 MCU
11