EZ80F91MCU ZILOG [Zilog, Inc.], EZ80F91MCU Datasheet - Page 165
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EZ80F91MCU
Manufacturer Part Number
EZ80F91MCU
Description
eZ80Acclaim-TM Flash Microcontrollers
Manufacturer
ZILOG [Zilog, Inc.]
Datasheet
1.EZ80F91MCU.pdf
(396 pages)
- Current page: 165 of 396
- Download datasheet (5Mb)
PS019209-0504
Timer Input Capture Value A Register—High Byte
The Timer x Input Capture Value A Register—High Byte, detailed in Table 63,
stores the High byte of the capture value for external input A. For Timer 1, the
external input is IC0. For Timer 3, it is IC2.
Table 63. Timer Input Capture Value Register A—High Byte
(TMR1_CAPA_H = 006Ch, TMR3_CAPA_H = 007Dh)
Timer Input Capture Value B Register—Low Byte
The Timer x Input Capture Value B Register—Low Byte, detailed in Table 64,
stores the Low byte of the capture value for external input B. For Timer 1, the
external input is IC1. For Timer 3, it is IC3.
Table 64. Timer Input Capture Value Register B—Low Byte
(TMR1_CAPB_L = 006Dh, TMR3_CAPB_L = 007Eh)
Bit
Reset
CPU Access
Note: R = Read only.
Bit
Position
[7:0]
TMR
Bit
Reset
CPU Access
Note: R = Read only.
Bit
Position
[7:0]
TMR
x
x
_CAPA_H
_CAPB_L
Value
00h–FFh These bits represent the High byte of the 2-byte capture
Value
00h–FFh These bits represent the Low byte of the 2-byte capture
P R E L I M I N A R Y
R
R
7
0
7
0
Description
value, {TMR
is bit 15 (msb) of the 16-bit data value. Bit 0 is bit 8 of the
16-bit timer data value.
Description
value, {TMR
is bit 7 of the 16-bit data value. Bit 0 is bit 0 (lsb) of the 16-
bit timer data value.
R
R
6
0
6
0
x
x
R
R
_CAPA_H[7:0], TMR
_CAPB_H[7:0], TMR
5
0
5
0
R
R
4
0
4
0
R
R
3
0
3
0
Programmable Reload Timers
Product Specification
x
x
_CAPA_L[7:0]}. Bit 7
_CAPB_L[7:0]}. Bit 7
R
R
2
0
2
0
eZ80F91 MCU
R
R
1
0
1
0
R
R
0
0
0
0
146
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