EZ80F91MCU ZILOG [Zilog, Inc.], EZ80F91MCU Datasheet - Page 285
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EZ80F91MCU
Manufacturer Part Number
EZ80F91MCU
Description
eZ80Acclaim-TM Flash Microcontrollers
Manufacturer
ZILOG [Zilog, Inc.]
Datasheet
1.EZ80F91MCU.pdf
(396 pages)
- Current page: 285 of 396
- Download datasheet (5Mb)
PS019209-0504
EMAC PHY Configuration Data Register—Low Byte
The Low Byte of the EMAC PHY Configuration Data Register represents the con-
figuration data written to the external PHY. See Table 155.
Table 155. EMAC PHY Configuration Data Register—Low Byte
(EMAC_CTLD_L = 003Ch)
Bit
Position
[2:0]
CLKS
Bit
Reset
CPU Access
Note: R/W = Read/Write.
Bit
Position
[7:0]
EMAC_CTLD_L
Value
Programmable divisor that produces MDC from SCLK.
000
001
010
011
100
101
110
111
Value
00h–
FFh
Description
MDC = SCLK ÷ 4.
MDC = SCLK ÷ 4.
MDC = SCLK ÷ 6.
MDC = SCLK ÷ 8.
MDC = SCLK ÷ 10.
MDC = SCLK ÷ 14.
MDC = SCLK ÷ 20.
MDC = SCLK ÷ 28.
R/W
P R E L I M I N A R Y
7
0
Description
These bits represent the Low byte of the 2-byte PHY
configuration data value, {EMAC_CTLD_H,
EMAC_CTLD_L}. Bit 7 is bit 7 of the 16-bit value. Bit 0 is bit
0 (lsb) of the 16-bit value.
R/W
6
0
R/W
5
0
R/W
4
0
R/W
Ethernet Media Access Controller
3
0
Product Specification
R/W
2
0
eZ80F91 MCU
R/W
1
0
R/W
0
0
266
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