EZ80F91MCU ZILOG [Zilog, Inc.], EZ80F91MCU Datasheet - Page 166

• Manufacturer Part Number: EZ80F91MCU
• Description: eZ80Acclaim-TM Flash Microcontrollers
• Manufacturer: ZILOG [Zilog, Inc.]

PS019209-0504
Timer Input Capture Value B Register—High Byte
The Timer x Input Capture Value B Register—High Byte, detailed in Table 65,
stores the High byte of the capture value for external input B. For Timer 1, the
external input is IC0. For Timer 3, it is IC3.
Table 65. Timer Input Capture Value Register B—High Byte
(TMR1_CAPB_H = 006Eh, TMR3_CAPB_H = 007Fh)
Timer Output Compare Control Register 1
The Timer3 Output Compare Control Register 1, detailed in Table 66, is used to
select the Master Mode and to provide initial values for the OC pins.
Table 66. Timer Output Compare Control Register 1
(TMR3_OC_CTL1 = 0080h)
Bit
Reset
CPU Access
Note: R = Read only.
Bit
Position
[7:0]
TMR
Bit
Reset
CPU Access
Note: R = Read only; R/W = Read/Write.
Bit
Position
[7:6]
5
OC3_INIT
4
OC2_INIT
x
_CAPB_H
Value
00h–FFh These bits represent the High byte of the 2-byte capture
Value
00
0
1
0
1
R/W
P R E L I M I N A R Y
R
7
0
7
0
Description
value, {TMR
is bit 15 (msb) of the 16-bit data value. Bit 0 is bit 8 of the
16-bit timer data value.
Description
Unused
OC pin cleared when initialized.
OC pin set when initialized.
OC pin cleared when initialized.
OC pin set when initialized.
R/W
R
6
0
6
0
R/W
x
R
_CAPB_H[7:0], TMR
5
0
5
0
R/W
R
4
0
4
0
R/W
R
3
0
3
0
Programmable Reload Timers
Product Specification
x
_CAPB_L[7:0]}. Bit 7
R/W
R
2
0
2
0
eZ80F91 MCU
R/W
R
1
0
1
0
R/W
R
0
0
0
0
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