EZ80F91MCU ZILOG [Zilog, Inc.], EZ80F91MCU Datasheet - Page 144
EZ80F91MCU
Manufacturer Part Number
EZ80F91MCU
Description
eZ80Acclaim-TM Flash Microcontrollers
Manufacturer
ZILOG [Zilog, Inc.]
Datasheet
1.EZ80F91MCU.pdf
(396 pages)
- Current page: 144 of 396
- Download datasheet (5Mb)
PS019209-0504
Bit
Position
5
RST_FLAG
4
NMI_FLAG
[3:2]
WDT_CLK
[1:0]
WDT_PERIOD
Note: When the WDT is enabled, no Writes are allowed to the WDT_CTL register.
Value Description
0
1
0
1
00
01
10
11
00
01
10
11
RESET caused by external full-chip reset or ZDI reset.
RESET caused by WDT time-out. This flag is set by the WDT
time-out, only if the NMI_OUT flag is set to 0. The CPU can
poll this bit to determine the source of the RESET. This flag is
cleared by a non-WDT generated reset.
NMI caused by external source.
NMI caused by WDT time-out. This flag is set by the WDT
time-out, only if the NMI_OUT flag is set to 1. The CPU can
poll this bit to determine the source of the NMI. This flag is
cleared by a non-WDT NMI.
WDT clock source is system clock.
WDT clock source is Real-Time Clock source (32KHz on-chip
oscillator or 50/60Hz input as set by RTC_CTRL[4]).
WDT clock source is internal RC oscillator (10KHz typical).
Reserved
WDT time-out period is 2
WDT time-out period is 2
WDT time-out period is 2
WDT time-out period is 2
P R E L I M I N A R Y
27
25
22
18
clock cycles.
clock cycles.
clock cycles.
clock cycles.
Product Specification
eZ80F91 MCU
Watch-Dog Timer
125
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