EZ80F91MCU ZILOG [Zilog, Inc.], EZ80F91MCU Datasheet - Page 384

• Manufacturer Part Number: EZ80F91MCU
• Description: eZ80Acclaim-TM Flash Microcontrollers
• Manufacturer: ZILOG [Zilog, Inc.]

Bus Mode Controller 78
bus mode state 79–80, 83
bus modes 78–79, 92, 96
bus request 15, 78, 98, 293, 302, 309
Bus Requests During ZDI Debug Mode 293
bus timing 78
BUSACK—see bus acknowledge
BUSREQ—see bus request
Byte Format, I
C
C source-level debugging 286
capture flag 134
carrier sense 255, 259–260
Chain Sequence and Length, JTAG Boundary
Change Log 363
Characteristics, Electrical
Charge Pump 320, 325
Chip Select Registers 93
Chip Select x Bus Mode Control Register 96
Chip Select x Control Register 95
Chip Select x Lower Bound Register 93
Chip Select x Upper Bound Register 94
Chip Select/Wait State Generator block 6–8,
Chip Selects and Wait States 73
Chip Selects During Bus Request/Bus
Clear To Send 18, 21, 199, 202
CLK_MUX 325
clock divisor value, 16-bit 189, 215
clock initialization circuitry 312
Clock Peripheral Power-Down Registers 55
Clock Phase 210–212, 216
Clock Polarity 211–212, 216
Clock Synchronization for Handshake 224
Clock Synchronization, I
PS019209-0504
Scan 314
10–11
Acknowledge Cycles 78
Switching Between 92
Window Referencing 260
MII 30, 259
PLL 321
Delta Status Change Of 202
2
C 221
2
C 222
P R E L I M I N A R Y
Clocking Overview 219
COL—see Collision Detect, MII
Collision Detect, MII 30
Complex triggers 311
CONTINUOUS mode 127, 130–132, 139,
Control Transfers, UART 187
CPHA—see Clock Phase
CPOL—see Clock Polarity
CRC—see cyclic redundancy check 246–247,
CRS—see Carrier Sense, MII
CS0 11, 73–76
CS1 12, 73–76
CS2 12, 73, 75–76
CS3 12, 73, 75–76
CTS—see Clear To Send
CTS0 18, 206
CTS1 21
Customer Feedback Form 379
cycle termination signal 89–90
D
data bus 12, 78–79, 81–83, 86, 90, 96, 168,
Data Carrier Detect 19, 22, 199, 202
Data Set Ready 19, 22, 199, 202
Data Terminal Ready 18, 22, 199, 202
Data Transfer Procedure with SPI configured
Data Transfer Procedure with SPI Configured
data transfer, SPI 217
Data Transfers, UART 187
Data Validity, I
DATA0 12
DATA1 12
DATA2 12
DATA3 12
DATA4 13
DATA5 13
143–144
251–252, 264
293–294, 303, 309
as a Slave 214
as the Master 214
Delta Status Change Of 202
Delta Status Change Of 202
2
C 220
Product Specification
eZ80F91 MCU
Index
365