EZ80F91MCU ZILOG [Zilog, Inc.], EZ80F91MCU Datasheet - Page 50
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EZ80F91MCU
Manufacturer Part Number
EZ80F91MCU
Description
eZ80Acclaim-TM Flash Microcontrollers
Manufacturer
ZILOG [Zilog, Inc.]
Datasheet
1.EZ80F91MCU.pdf
(396 pages)
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Table 2. Pin Identification on the eZ80F91 Device (Continued)
PS019209-0504
LQFP
Pin #
126
127
128
129
130
131
132
133
134
Note: *PHY represents the physical layer of the OSI model.
BGA
Pin#
B7
C7
D7
A6
B6
C6
E7
A5
B5
Symbol
TxD3
TxD2
TxD1
TxD0
Tx_EN
Tx_CLK
Tx_ER
V
V
DD
SS
Function
MII Transmit
Data
MII Transmit
Data
MII Transmit
Data
MII Transmit
Data
MII Transmit
Enable
MII Transmit
Clock
MII Transmit
Error
Power Supply
Ground
P R E L I M I N A R Y
Signal Direction
Output
Output
Output
Output
Output
Input
Output
Description
This pin is used by the Ethernet
MAC for the MII Interface to the
PHY. Transmit Data is
synchronous to the rising-edge of
Tx_CLK.
This pin is used by the Ethernet
MAC for the MII Interface to the
PHY. Transmit Data is
synchronous to the rising-edge of
Tx_CLK.
This pin is used by the Ethernet
MAC for the MII Interface to the
PHY. Transmit Data is
synchronous to the rising-edge of
Tx_CLK.
This pin is used by the Ethernet
MAC for the MII Interface to the
PHY. Transmit Data is
synchronous to the rising-edge of
Tx_CLK.
This pin is used by the Ethernet
MAC for the MII Interface to the
PHY. Transmit Enable is
synchronous to the rising-edge of
Tx_CLK.
This pin is used by the Ethernet
MAC for the MII Interface to the
PHY. Transmit Clock is the
Nibble or Symbol Clock provided
by the MII PHY Interface.
This pin is used by the Ethernet
MAC for the MII Interface to the
PHY. Transmit Error is
synchronous to the rising-edge of
Tx_CLK.
Power Supply.
Ground.
Product Specification
Architectural Overview
eZ80F91 MCU
31
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