EZ80F91MCU ZILOG [Zilog, Inc.], EZ80F91MCU Datasheet - Page 51

• Manufacturer Part Number: EZ80F91MCU
• Description: eZ80Acclaim-TM Flash Microcontrollers
• Manufacturer: ZILOG [Zilog, Inc.]

Table 2. Pin Identification on the eZ80F91 Device (Continued)
PS019209-0504
LQFP
Pin #
135
136
137
138
139
140
Note: *PHY represents the physical layer of the OSI model.
BGA
Pin#
D6
C5
A4
E6
B4
D5
Symbol
Rx_ER
Rx_CLK
Rx_DV
RxD0
RxD1
RxD2
Function
MII Receive
Error
MII Receive
Clock
MII Receive
Data Valid
MII Receive
Data
MII Receive
Data
MII Receive
Data
P R E L I M I N A R Y
Signal Direction
Input
Input
Input
Input
Input
Input
Description
This pin is used by the Ethernet
MAC for the MII Interface to the
PHY. Receive Error is provided
by the MII PHY Interface
synchronous to the rising-edge of
Rx_CLK.
This pin is used by the Ethernet
MAC for the MII Interface to the
PHY. Receive Clock is the Nibble
or Symbol Clock provided by the
MII PHY Interface.
This pin is used by the Ethernet
MAC for the MII Interface to the
PHY. Receive Data Valid is
provided by the MII PHY Interface
synchronous to the rising-edge of
Rx_CLK.
This pin is used by the Ethernet
MAC for the MII Interface to the
PHY. Receive Data is provided
by the MII PHY Interface
synchronous to the rising-edge of
Rx_CLK.
This pin is used by the Ethernet
MAC for the MII Interface to the
PHY. Receive Data is provided
by the MII PHY Interface
synchronous to the rising-edge of
Rx_CLK.
This pin is used by the Ethernet
MAC for the MII Interface to the
PHY. Receive Data is provided
by the MII PHY Interface
synchronous to the rising-edge of
Rx_CLK.
Product Specification
Architectural Overview
eZ80F91 MCU
32