EZ80F91MCU ZILOG [Zilog, Inc.], EZ80F91MCU Datasheet - Page 313

• Manufacturer Part Number: EZ80F91MCU
• Description: eZ80Acclaim-TM Flash Microcontrollers
• Manufacturer: ZILOG [Zilog, Inc.]

PS019209-0504
ZDI Write Only Registers
not currently shifting data, it acknowledges the bus request immediately. ZDI uses
the single-bit byte separator of each data word to determine if it is at the end of a
ZDI operation. If the bit is a logical 0, ZDI does not assert BUSACK to allow addi-
tional data Read or Write operations. If the bit is a logical 1, indicating completion
of the ZDI commands, BUSACK is asserted.
Potential Hazards of Enabling Bus Requests During Debug Mode
There are some potential hazards that the user must be aware of when enabling
external bus requests during ZDI DEBUG mode. First, when the address and data
bus are being used by an external source, ZDI must only access ZDI registers
and internal CPU registers to prevent possible bus contention. The bus acknowl-
edge status is reported in the ZDI_BUS_STAT register. The BUSACK output pin
also indicates the bus acknowledge state.
A second hazard is that when a bus acknowledge is granted, the ZDI is subject to
any wait states that are assigned to the device currently being accessed by the
external peripheral. To prevent data errors, ZDI should avoid data transmission
while another device is controlling the bus.
Finally, exiting ZDI Debug mode while an external peripheral controls the address
and data buses, as indicated by BUSACK assertion, can produce unpredictable
results.
Table 186 lists the ZDI Write Only registers. Many of the ZDI Write Only
addresses are shared with ZDI Read Only registers.
Table 186. ZDI Write Only Registers
ZDI Address
00h
01h
02h
04h
05h
06h
08h
09h
0Ah
0Ch
ZDI Register Name
ZDI_ADDR0_L
ZDI_ADDR0_H
ZDI_ADDR0_U
ZDI_ADDR1_L
ZDI_ADDR1_H
ZDI_ADDR1_U
ZDI_ADDR2_L
ZDI_ADDR2_H
ZDI_ADDR2_U
ZDI_ADDR3_L
P R E L I M I N A R Y
ZDI Register Function
Address Match 0 Low Byte
Address Match 0 High Byte
Address Match 0 Upper Byte
Address Match 1 Low Byte
Address Match 1 High Byte
Address Match 1 Upper Byte
Address Match 2 Low Byte
Address Match 2 High Byte
Address Match 2 Upper Byte
Address Match 3 Low Byte
Product Specification
ZiLOG Debug Interface
eZ80F91 MCU
Reset
Value
XXh
XXh
XXh
XXh
XXh
XXh
XXh
XXh
XXh
XXh
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