MC68360VR25VL Freescale Semiconductor, MC68360VR25VL Datasheet - Page 70
MC68360VR25VL
Manufacturer Part Number
MC68360VR25VL
Description
IC MPU QUICC 25MHZ 357-PBGA
Manufacturer
Freescale Semiconductor
Datasheets
1.MC68EN360VR25L.pdf
(14 pages)
2.MC68EN360VR25L.pdf
(2 pages)
3.MC68360AI25L.pdf
(962 pages)
Specifications of MC68360VR25VL
Processor Type
M683xx 32-Bit
Speed
25MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
357-PBGA
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
25MHz
Instruction Set Architecture
RISC
Operating Supply Voltage (max)
3.3V
Operating Supply Voltage (min)
2.7V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
357
Package Type
BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant
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QUICC Memory Map
3.3 INTERNAL REGISTERS MEMORY MAP
In addition to the internal dual-port RAM, there are a number of internal registers to support
the functions of the various CPU32+ core peripherals. The internal registers (see Table 3-3
and Table 3-4) are memory-mapped registers offset from the register base (REGBASE)
pointer. REGBASE (abbreviated REGB) = DPRBASE + 4K. All registers are located on the
internal IMB.
3.3.1 SIM Registers Memory Map
Table 3-3 lists the SIM registers memory map.
3-4
All registers that are underlined in the following tables are spe-
cial registers called event registers. In these registers, bits are
set by the QUICC and cleared by the user. To clear a bit, the
user must write a one to that bit. For example, to clear bit 2 in
SCCE1, the MOVE.B #$04,SCCE1 instruction may be used. Do
NOT use read-modify-write instructions (such as BSET, BCLR,
AND, OR, etc.) with these registers, or ALL bits in that register
will inadvertently be cleared. See the individual register descrip-
tions for more information.
All undefined and reserved bits within registers and parameter
RAM values written by the user should be written with zero to al-
low for future enhancements to the device.
Bold letters mark registers that are restricted to supervisor ac-
cess.
Table 3-2. CPM Sub-Module Base Addresses
Freescale Semiconductor, Inc.
3
4
4
4
For More Information On This Product,
MC68360 USER’S MANUAL
Go to: www.freescale.com
IDMA2 Base
SMC1 Base
SMC2 Base
SCC4 Base
NOTES
DPRBASE + $E80
DPRBASE + $F00
DPRBASE + $F70
DPRBASE + $F80
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