MC68360VR25VL Freescale Semiconductor, MC68360VR25VL Datasheet - Page 670

• Manufacturer Part Number: MC68360VR25VL
• Description: IC MPU QUICC 25MHZ 357-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68360VR25VL

• Processor Type: M683xx 32-Bit
• Speed: 25MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 357-PBGA
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Operating Supply Voltage (max): 3.3V
• Operating Supply Voltage (min): 2.7V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 357
• Package Type: BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

Parallel Interface Port (PIP)
Certain parameter RAM values above (marked in bold face) need to be initialized by the
user before the PIP is enabled; the others are initialized/written by the CP. Once initialized,
most parameter RAM values will not need to be accessed in user software since most of the
activity is centered around the transmit buffer descriptors, not the parameter RAM.
7.13.8.4 BUFFER DESCRIPTOR TABLE POINTER (TBASE). The TBASE entry defines
the starting location in the dual-port RAM for the PIP transmitter’s set of buffer descriptors.
This provides a great deal of flexibility in how BDs are partitioned. By programming the
TBASE entry and by setting the "wrap" bit in the last BD , the user may select how many
BDs to allocate for the transmit function. The user must initialize TBASE before enabling the
channel.
7.13.8.5 STATUS MASK REGISTER (SMASK). The status mask register controls which of
the printer status lines will be checked before each transfer..
S—Select Error
PE—Printer Error
F—Fault
7.13.8.6 CENTRONICS FUNCTION CODE REGISTER (CFCR). The FC entry contains the
value that the user would like to appear on the function code pins (FC3-0) when the associ-
ated SDMA channel accesses memory. It also controls the byte ordering convention to be
used in the transfers.
FC3-0—Function Code 3-0
7-346
These bits contain the function code value used during this SDMA channel’s memory ac-
cesses. It is suggested that the user write bit FC3 with a one to identify this SDMA channel
0 = The Select status will be ignored
1 = The Select status line will be checked during transmission
0 = The PError status will be ignored
1 = The PError status line will be checked during transmission
0 = The Fault status will be ignored
1 = The Fault status line will be checked during transmission
TBASE should contain a value that is divisible by 8.
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Freescale Semiconductor, Inc.
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For More Information On This Product,
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MC68360 USER’S MANUAL
Go to: www.freescale.com
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MOT
NOTE
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