MC68360VR25VL Freescale Semiconductor, MC68360VR25VL Datasheet - Page 515
![IC MPU QUICC 25MHZ 357-PBGA](/photos/6/76/67680/mfg_mpc860_series_sml.jpg)
MC68360VR25VL
Manufacturer Part Number
MC68360VR25VL
Description
IC MPU QUICC 25MHZ 357-PBGA
Manufacturer
Freescale Semiconductor
Datasheets
1.MC68EN360VR25L.pdf
(14 pages)
2.MC68EN360VR25L.pdf
(2 pages)
3.MC68360AI25L.pdf
(962 pages)
Specifications of MC68360VR25VL
Processor Type
M683xx 32-Bit
Speed
25MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
357-PBGA
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
25MHz
Instruction Set Architecture
RISC
Operating Supply Voltage (max)
3.3V
Operating Supply Voltage (min)
2.7V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
357
Package Type
BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant
Available stocks
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Manufacturer
Quantity
Price
Company:
Part Number:
MC68360VR25VL
Manufacturer:
Exar
Quantity:
160
Company:
Part Number:
MC68360VR25VL
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Part Number:
MC68360VR25VLR2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Figure 7-55 shows the other LAN-type configuration of HDLC bus. In this configuration, a
master station transmits to any slave station, with no collisions possible. The slaves com-
municate only with the master, but may experience collisions in their access over the bus.
In this configuration, a slave that must communicate with another slave must first transmit
its data to the master, where the data is buffered in RAM and then retransmitted to the other
slave. The benefit of this configuration, however, is that full-duplex operation may be
obtained. This configuration is preferred in a point-to-multipoint environment.
NOTES:
NOTES:
1. Transceivers may be used to extend the LAN size, if necessary.
2. The TXD pins of slave devices should be configured to open-drain in the port C parallel I/O port.
RXD
1. Transceivers may be used to extend the LAN size, if necessary.
2. The TXD pins should be configured to open-drain in the port C parallel I/O port.
RXD
CONTROLLER
MASTER
CONTROLLER
HDLC
HDLC-BUS
Figure 7-55. HDLC Bus Single-Master Configuration
TXD
MASTER
A
Figure 7-54. HDLC Bus Multi-Master Configuration
TXD
A
Freescale Semiconductor, Inc.
CTS
For More Information On This Product,
MC68360 USER’S MANUAL
Go to: www.freescale.com
HDLC-BUS LAN
RXD
RXD
CONTROLLER
HDLC BUS
HDLC-BUS LAN
CONTROLLER
SLAVE
TXD
HDLC-BUS
MASTER
B
TXD
B
CTS
CTS
Serial Communication Controllers (SCCs)
RXD
RXD
CONTROLLER
HDLC BUS
CONTROLLER
SLAVE
HDLC-BUS
TXD
MASTER
C
TXD
C
CTS
CTS
R
R
+5
+5
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