MC68360VR25VL Freescale Semiconductor, MC68360VR25VL Datasheet - Page 239

IC MPU QUICC 25MHZ 357-PBGA

MC68360VR25VL

Manufacturer Part Number
MC68360VR25VL
Description
IC MPU QUICC 25MHZ 357-PBGA
Manufacturer
Freescale Semiconductor

Specifications of MC68360VR25VL

Processor Type
M683xx 32-Bit
Speed
25MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
357-PBGA
Family Name
M68000
Device Core
ColdFire
Device Core Size
32b
Frequency (max)
25MHz
Instruction Set Architecture
RISC
Operating Supply Voltage (max)
3.3V
Operating Supply Voltage (min)
2.7V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
357
Package Type
BGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant

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ber of clock cycles is outside the parentheses. The numbers inside parentheses (r/p/w) are
included in the total clock cycle number. All timing data assumes two-clock reads and writes.
5.7.2.10 BIT MANIPULATION INSTRUCTIONS. The bit manipulation instruction table indi-
cates the number of clock periods needed for the processor to perform the specified opera-
tion on the given addressing mode. The total number of clock cycles is outside the
parentheses. The numbers inside parentheses (r/p/w) are included in the total clock cycle
number. All timing data assumes two-clock reads and writes.
LSd
LSd
LSd
ASd
ASd
ASd
ROd
ROd
ROd
ROXd
ROXd
ROXd
d = Direction (left or right)
NOTES:
1. Head and cycle times can be derived from the following table or calculated as follows:
2. Head and cycle times are calculated as follows: (count
3. Head and cycle times are calculated as follows: (count
4. Timing is calculated with the CPU32+ in 16-bit mode.
Clocks
Max (3
10
12
14
16
18
20
22
6
8
(n/4)
15
23
31
39
47
55
63
0
7
Dn, Dm
#, Dm
Dn, Dm
#, Dm
Dn, Dm
#, Dm
Dn, Dm
#, Dm
FEA
FEA
FEA
FEA
mod(n,4)
10
18
26
34
42
50
58
1
Instruction
Freescale Semiconductor, Inc.
For More Information On This Product,
mod (((n/4)
11
19
27
35
43
51
59
2
MC68360 USER’S MANUAL
Go to: www.freescale.com
13
21
29
37
45
53
61
3
mod (n,4)
Shift Counts
14
22
30
38
46
54
62
4
1,2), 6)
63): max (3
8): max (2
16
24
32
40
48
56
5
Head
4
0
4
0
4
0
0
2
2
2
2
2
n
17
25
33
41
49
57
6
n
mod (n,2), 6).
mod (n
Tail
0
0
2
0
0
2
0
0
2
0
0
2
20
28
36
44
52
60
8
1,2), 6).
6(0/1/0)
6(0/1/1)
6(0/1/0)
6(0/1/1)
6(0/1/0)
6(0/1/1)
6(0/1/1)
Cycles
(0/1/0)
(0/1/0)
(0/1/0)
(0/1/0)
(0/1/0)
9
Note
12
1
1
1
2
3
CPU32+

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