MC68360VR25VL Freescale Semiconductor, MC68360VR25VL Datasheet - Page 179

• Manufacturer Part Number: MC68360VR25VL
• Description: IC MPU QUICC 25MHZ 357-PBGA
• Manufacturer: Freescale Semiconductor

Specifications of MC68360VR25VL

• Processor Type: M683xx 32-Bit
• Speed: 25MHz
• Voltage: 3.3V
• Mounting Type: Surface Mount
• Package / Case: 357-PBGA
• Family Name: M68000
• Device Core: ColdFire
• Device Core Size: 32b
• Frequency (max): 25MHz
• Instruction Set Architecture: RISC
• Operating Supply Voltage (max): 3.3V
• Operating Supply Voltage (min): 2.7V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 357
• Package Type: BGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

Vector Number
64–255
16–23
32–47
48–58
59–63
10
11
12
13
14
15
24
25
26
27
28
29
30
31
0
1
2
3
4
5
6
7
8
9
Because there is no protection on the 64 processor-defined vec-
tors, external devices can access vectors reserved for internal
purposes. This practice is strongly discouraged.
Table 5-16. Exception Vector Assignments
Freescale Semiconductor, Inc.
For More Information On This Product,
1020
Dec
100
104
108
112
116
120
124
128
188
192
232
236
252
256
12
16
20
24
28
32
36
40
44
48
52
56
60
64
92
96
0
4
8
Vector Offset
MC68360 USER’S MANUAL
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0BC
0EC
0FC
3FC
Hex
00C
01C
02C
03C
05C
06C
07C
0C0
0E8
000
004
008
010
014
018
020
024
028
030
034
038
040
060
064
068
070
074
078
080
100
CAUTION
Space
SP
SP
SD
SD
SD
SD
SD
SD
SD
SD
SD
SD
SD
SD
SD
SD
SD
SD
SD
SD
SD
SD
SD
SD
SD
SD
SD
SD
SD
Reset: Initial Stack Pointer
Reset: Initial Program Counter
Bus Error
Address Error
Illegal Instruction
Zero Division
CHK, CHK2 Instructions
TRAPcc, TRAPV Instructions
Privilege Violation
Trace
Line 1010 Emulator
Line 1111 Emulator
Hardware Breakpoint
(Reserved for Coprocessor Protocol Violation)
Format Error
Uninitialized Interrupt
(Unassigned, Reserved)
—
Spurious Interrupt
Level 1 Interrupt Autovector
Level 2 Interrupt Autovector
Level 3 Interrupt Autovector
Level 4 Interrupt Autovector
Level 5 Interrupt Autovector
Level 6 Interrupt Autovector
Level 7 Interrupt Autovector
Trap Instruction Vectors (0–15)
—
(Reserved for Coprocessor)
—
(Unassigned, Reserved)
—
User-Defined Vectors (192)
Assignment
CPU32+